diff options
| author | mindchasers <privateisland@mindchasers.com> | 2020-11-26 16:49:13 -0500 |
|---|---|---|
| committer | mindchasers <privateisland@mindchasers.com> | 2020-11-26 16:49:13 -0500 |
| commit | 447c51f54516832e72eb71dd3b21b4cb549c4aff (patch) | |
| tree | bf27b23b634d27aa115d2636fa4614ee9d09ee9b /manufacturer/lattice/ecp5um/privateisland.ldf | |
| parent | 418d6a06c539854c326a7099208080a92ae8ddb1 (diff) | |
project: remove DARSENA_V01 support and minor cleanup
Diffstat (limited to 'manufacturer/lattice/ecp5um/privateisland.ldf')
| -rw-r--r-- | manufacturer/lattice/ecp5um/privateisland.ldf | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/manufacturer/lattice/ecp5um/privateisland.ldf b/manufacturer/lattice/ecp5um/privateisland.ldf index 1968d1b..ede192c 100644 --- a/manufacturer/lattice/ecp5um/privateisland.ldf +++ b/manufacturer/lattice/ecp5um/privateisland.ldf @@ -6,12 +6,13 @@ <Implementation title="impl1" dir="impl1" description="impl1" synthesis="synplify" default_strategy="darsena"> <Options> <Option name="HDL type" value="Verilog"/> - <Option name="include path" value="remote_files/include"/> + <Option name="def_top" value="top"/> + <Option name="include path" value="../../../source"/> <Option name="lib" value="work"/> <Option name="top" value="top"/> </Options> <Source name="source/top.v" type="Verilog" type_short="Verilog"> - <Options/> + <Options top_module="top"/> </Source> <Source name="../../../source/bin_to_ascii.v" type="Verilog" type_short="Verilog"> <Options/> |
