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path: root/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf
AgeCommit message (Expand)Author
2021-03-02lpf: use GPIO for directly instead of specific shield I/O names and general ...mindchasers
2020-11-19lattice: clean up project files to match latest topmindchasers
2020-11-16project: rename device to lattice to include specific manufacturersmindchasers
generated by cgit v1.2.3-8-gadcc (git 2.29.0) at 2024-05-16 03:20:46 +0000

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Digital VLSI Design with Verilog: A Textbook from Silicon Valley Polytechnic Institute
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