From 5723ec1a34181f1cfef9b8e870ab2e9a0362487c Mon Sep 17 00:00:00 2001
From: mindchasers <privateisland@mindchasers.com>
Date: Wed, 1 May 2019 18:16:45 -0400
Subject: initial commit, all basic functions work on Darsena V02

---
 testbenches/README | 3 +++
 1 file changed, 3 insertions(+)
 create mode 100644 testbenches/README

(limited to 'testbenches')

diff --git a/testbenches/README b/testbenches/README
new file mode 100644
index 0000000..0c38a5f
--- /dev/null
+++ b/testbenches/README
@@ -0,0 +1,3 @@
+System Verilog Test Benches
+
+Will be added soon
-- 
cgit v1.2.3-8-gadcc