From 5723ec1a34181f1cfef9b8e870ab2e9a0362487c Mon Sep 17 00:00:00 2001
From: mindchasers <privateisland@mindchasers.com>
Date: Wed, 1 May 2019 18:16:45 -0400
Subject: initial commit, all basic functions work on Darsena V02

---
 source/pkt_filter.v | 93 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 93 insertions(+)
 create mode 100644 source/pkt_filter.v

(limited to 'source/pkt_filter.v')

diff --git a/source/pkt_filter.v b/source/pkt_filter.v
new file mode 100644
index 0000000..e632d32
--- /dev/null
+++ b/source/pkt_filter.v
@@ -0,0 +1,93 @@
+/* 
+ *	pkt_filter.v
+ *
+ *   Copyright (C) 2018, 2019 Mind Chasers Inc.
+ *
+ *   Licensed under the Apache License, Version 2.0 (the "License");
+ *   you may not use this file except in compliance with the License.
+ *   You may obtain a copy of the License at
+ *
+ *       http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *   Unless required by applicable law or agreed to in writing, software
+ *   distributed under the License is distributed on an "AS IS" BASIS,
+ *   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *   See the License for the specific language governing permissions and
+ *   limitations under the License.
+ *
+ *	function: packet filter / CAM wrapper with keep / drop logic 
+ *	 
+ */
+ 
+`timescale 1ns /10ps
+
+module pkt_filter #(parameter DEPTH = 4,
+			parameter DEPTHW = 2,
+			parameter WIDTH = 32)
+(
+	input	rstn,
+	input	clk,
+	
+	// input for programming
+	input   sel,
+	input 	we,
+	input 	[DEPTHW+1:0] addr,
+	input 	[7:0]	d_in,
+	
+	// registered data
+	input[7:0] rx_data_m1, 
+	input[7:0] rx_data_m2, 
+	input[7:0] rx_data_m3, 
+	input[7:0] rx_data_m4,
+	
+	// filter
+	input new_frame,	// assert for each new frame to reset state machines
+	input block,
+	input invert,
+	input trigger,
+	output reg keep
+);
+
+reg trigger_m1;
+
+
+/* trigger_m1 is used to sync the CAM search with testing the results below */
+always @(posedge clk or negedge rstn)
+	if (!rstn)
+		trigger_m1 <= 1'b0;
+	else
+		trigger_m1 <= trigger;
+
+/* keep is a one shot */
+always @(posedge clk or negedge rstn)
+	if (!rstn)
+		keep <= 1'b0;
+	else if (trigger_m1)
+		if ( block )
+			keep <= 1'b0;
+		else if ( !invert )
+			keep <= match;
+		else begin
+			keep <= ~match;
+		end	
+	else
+		keep <= 1'b0;
+	
+cam  #(.DEPTH(DEPTH), .DEPTHW(DEPTHW), .WIDTH(WIDTH)) cam_0(
+	.rstn( rstn ),
+	.clk( clk ),
+	
+	// input for programming
+	.sel( sel ),
+	.we( we ),
+	.addr( addr ),
+	.d_in( d_in ),
+	// cam action
+	.search( trigger ),
+	.search_address( { rx_data_m4, rx_data_m3, rx_data_m2, rx_data_m1 } ),
+	.match( match )
+);
+	
+	
+	
+endmodule
-- 
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