From 5723ec1a34181f1cfef9b8e870ab2e9a0362487c Mon Sep 17 00:00:00 2001
From: mindchasers <privateisland@mindchasers.com>
Date: Wed, 1 May 2019 18:16:45 -0400
Subject: initial commit, all basic functions work on Darsena V02

---
 clarity/pcs/refclk0/refclk0.lpc | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)
 create mode 100644 clarity/pcs/refclk0/refclk0.lpc

(limited to 'clarity/pcs/refclk0/refclk0.lpc')

diff --git a/clarity/pcs/refclk0/refclk0.lpc b/clarity/pcs/refclk0/refclk0.lpc
new file mode 100644
index 0000000..4e2184e
--- /dev/null
+++ b/clarity/pcs/refclk0/refclk0.lpc
@@ -0,0 +1,31 @@
+[Device]
+Family=ecp5um
+OperatingCondition=COM
+Package=CABGA381
+PartName=LFE5UM-45F-8BG381C
+PartType=LFE5UM-45F
+SpeedGrade=8
+Status=P
+[IP]
+CoreName=EXTREF
+CoreRevision=1.1
+CoreStatus=Demo
+CoreType=LPM
+Date=10/17/2017
+ModuleName=refclk0
+ParameterFileVersion=1.0
+SourceFormat=verilog
+Time=18:21:09
+VendorName=Lattice Semiconductor Corporation
+[Parameters]
+Destination=Synplicity
+EDIF=1
+EXTREFDCBIAS=Disabled
+EXTREFTERMRES=50 ohms
+Expression=BusA(0 to 7)
+IO=0
+Order=Big Endian [MSB:LSB]
+VHDL=0
+Verilog=1
+[SYSTEMPNR]
+EXTREF=DCU0
-- 
cgit v1.2.3-8-gadcc