From 5723ec1a34181f1cfef9b8e870ab2e9a0362487c Mon Sep 17 00:00:00 2001 From: mindchasers Date: Wed, 1 May 2019 18:16:45 -0400 Subject: initial commit, all basic functions work on Darsena V02 --- clarity/pcs/pcs.sbx | 7844 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 7844 insertions(+) create mode 100644 clarity/pcs/pcs.sbx (limited to 'clarity/pcs/pcs.sbx') diff --git a/clarity/pcs/pcs.sbx b/clarity/pcs/pcs.sbx new file mode 100644 index 0000000..6941e9c --- /dev/null +++ b/clarity/pcs/pcs.sbx @@ -0,0 +1,7844 @@ + + + + LATTICE + LOCAL + pcs + 1.0 + + + Diamond_Synthesis + synthesis + + ./pcs.v + verilogSource + + + + Diamond_Simulation + simulation + + ./pcs.v + verilogSource + + + + + + + + + refclk0_refclkn + refclk0_refclkn + + in + + + + refclk0.refclkn + + + + + refclk0_refclkp + refclk0_refclkp + + in + + + + refclk0.refclkp + + + + + sgmii0_ctc_del_s + sgmii0_ctc_del_s + + out + + + + sgmii0.ctc_del_s + + + + + sgmii0_ctc_ins_s + sgmii0_ctc_ins_s + + out + + + + sgmii0.ctc_ins_s + + + + + sgmii0_ctc_orun_s + sgmii0_ctc_orun_s + + out + + + + sgmii0.ctc_orun_s + + + + + sgmii0_ctc_urun_s + sgmii0_ctc_urun_s + + out + + + + sgmii0.ctc_urun_s + + + + + sgmii0_cyawstn + sgmii0_cyawstn + + in + + + + sgmii0.cyawstn + + + + + sgmii0_hdinn + sgmii0_hdinn + + in + + + + sgmii0.hdinn + + + + + sgmii0_hdinp + sgmii0_hdinp + + in + + + + sgmii0.hdinp + + + + + sgmii0_hdoutn + sgmii0_hdoutn + + out + + + + sgmii0.hdoutn + + + + + sgmii0_hdoutp + sgmii0_hdoutp + + out + + + + sgmii0.hdoutp + + + + + sgmii0_lsm_status_s + sgmii0_lsm_status_s + + out + + + + sgmii0.lsm_status_s + + + + + sgmii0_pll_lol + sgmii0_pll_lol + + out + + + + sgmii0.pll_lol + + + + + sgmii0_rst_dual_c + sgmii0_rst_dual_c + + in + + + + sgmii0.rst_dual_c + + + + + sgmii0_rx_cdr_lol_s + sgmii0_rx_cdr_lol_s + + out + + + + sgmii0.rx_cdr_lol_s + + + + + sgmii0_rx_los_low_s + sgmii0_rx_los_low_s + + out + + + + sgmii0.rx_los_low_s + + + + + sgmii0_rx_pcs_rst_c + sgmii0_rx_pcs_rst_c + + in + + + + sgmii0.rx_pcs_rst_c + + + + + sgmii0_rx_pwrup_c + sgmii0_rx_pwrup_c + + in + + + + sgmii0.rx_pwrup_c + + + + + sgmii0_rx_serdes_rst_c + sgmii0_rx_serdes_rst_c + + in + + + + sgmii0.rx_serdes_rst_c + + + + + sgmii0_sci_en + sgmii0_sci_en + + in + + + + sgmii0.sci_en + + + + + sgmii0_sci_en_dual + sgmii0_sci_en_dual + + in + + + + sgmii0.sci_en_dual + + + + + sgmii0_sci_int + sgmii0_sci_int + + out + + + + sgmii0.sci_int + + + + + sgmii0_sci_rd + sgmii0_sci_rd + + in + + + + sgmii0.sci_rd + + + + + sgmii0_sci_sel + sgmii0_sci_sel + + in + + + + sgmii0.sci_sel + + + + + sgmii0_sci_sel_dual + sgmii0_sci_sel_dual + + in + + + + sgmii0.sci_sel_dual + + + + + sgmii0_sci_wrn + sgmii0_sci_wrn + + in + + + + sgmii0.sci_wrn + + + + + sgmii0_serdes_rst_dual_c + sgmii0_serdes_rst_dual_c + + in + + + + sgmii0.serdes_rst_dual_c + + + + + sgmii0_signal_detect_c + sgmii0_signal_detect_c + + in + + + + sgmii0.signal_detect_c + + + + + sgmii0_tx_pclk + sgmii0_tx_pclk + + out + + + + sgmii0.tx_pclk + + + + + sgmii0_tx_pcs_rst_c + sgmii0_tx_pcs_rst_c + + in + + + + sgmii0.tx_pcs_rst_c + + + + + sgmii0_tx_pwrup_c + sgmii0_tx_pwrup_c + + in + + + + sgmii0.tx_pwrup_c + + + + + sgmii0_tx_serdes_rst_c + sgmii0_tx_serdes_rst_c + + in + + + + sgmii0.tx_serdes_rst_c + + + + + sgmii0_txi_clk + sgmii0_txi_clk + + in + + + + sgmii0.txi_clk + + + + + sgmii1_ctc_del_s + sgmii1_ctc_del_s + + out + + + + sgmii1.ctc_del_s + + + + + sgmii1_ctc_ins_s + sgmii1_ctc_ins_s + + out + + + + sgmii1.ctc_ins_s + + + + + sgmii1_ctc_orun_s + sgmii1_ctc_orun_s + + out + + + + sgmii1.ctc_orun_s + + + + + sgmii1_ctc_urun_s + sgmii1_ctc_urun_s + + out + + + + sgmii1.ctc_urun_s + + + + + sgmii1_hdinn + sgmii1_hdinn + + in + + + + sgmii1.hdinn + + + + + sgmii1_hdinp + sgmii1_hdinp + + in + + + + sgmii1.hdinp + + + + + sgmii1_hdoutn + sgmii1_hdoutn + + out + + + + sgmii1.hdoutn + + + + + sgmii1_hdoutp + sgmii1_hdoutp + + out + + + + sgmii1.hdoutp + + + + + sgmii1_lsm_status_s + sgmii1_lsm_status_s + + out + + + + sgmii1.lsm_status_s + + + + + sgmii1_rst_dual_c + sgmii1_rst_dual_c + + in + + + + sgmii1.rst_dual_c + + + + + sgmii1_rx_cdr_lol_s + sgmii1_rx_cdr_lol_s + + out + + + + sgmii1.rx_cdr_lol_s + + + + + sgmii1_rx_los_low_s + sgmii1_rx_los_low_s + + out + + + + sgmii1.rx_los_low_s + + + + + sgmii1_rx_pcs_rst_c + sgmii1_rx_pcs_rst_c + + in + + + + sgmii1.rx_pcs_rst_c + + + + + sgmii1_rx_pwrup_c + sgmii1_rx_pwrup_c + + in + + + + sgmii1.rx_pwrup_c + + + + + sgmii1_rx_serdes_rst_c + sgmii1_rx_serdes_rst_c + + in + + + + sgmii1.rx_serdes_rst_c + + + + + sgmii1_sci_en + sgmii1_sci_en + + in + + + + sgmii1.sci_en + + + + + sgmii1_sci_sel + sgmii1_sci_sel + + in + + + + sgmii1.sci_sel + + + + + sgmii1_serdes_pdb + sgmii1_serdes_pdb + + in + + + + sgmii1.serdes_pdb + + + + + sgmii1_serdes_rst_dual_c + sgmii1_serdes_rst_dual_c + + in + + + + sgmii1.serdes_rst_dual_c + + + + + sgmii1_signal_detect_c + sgmii1_signal_detect_c + + in + + + + sgmii1.signal_detect_c + + + + + sgmii1_tx_pclk + sgmii1_tx_pclk + + out + + + + sgmii1.tx_pclk + + + + + sgmii1_tx_pcs_rst_c + sgmii1_tx_pcs_rst_c + + in + + + + sgmii1.tx_pcs_rst_c + + + + + sgmii1_tx_pwrup_c + sgmii1_tx_pwrup_c + + in + + + + sgmii1.tx_pwrup_c + + + + + sgmii1_tx_serdes_rst_c + sgmii1_tx_serdes_rst_c + + in + + + + sgmii1.tx_serdes_rst_c + + + + + sgmii1_txi_clk + sgmii1_txi_clk + + in + + + + sgmii1.txi_clk + + + + + sgmii2_ctc_del_s + sgmii2_ctc_del_s + + out + + + + sgmii2.ctc_del_s + + + + + sgmii2_ctc_ins_s + sgmii2_ctc_ins_s + + out + + + + sgmii2.ctc_ins_s + + + + + sgmii2_ctc_orun_s + sgmii2_ctc_orun_s + + out + + + + sgmii2.ctc_orun_s + + + + + sgmii2_ctc_urun_s + sgmii2_ctc_urun_s + + out + + + + sgmii2.ctc_urun_s + + + + + sgmii2_cyawstn + sgmii2_cyawstn + + in + + + + sgmii3.cyawstn + + + + + sgmii2_hdinn + sgmii2_hdinn + + in + + + + sgmii2.hdinn + + + + + sgmii2_hdinp + sgmii2_hdinp + + in + + + + sgmii2.hdinp + + + + + sgmii2_hdoutn + sgmii2_hdoutn + + out + + + + sgmii2.hdoutn + + + + + sgmii2_hdoutp + sgmii2_hdoutp + + out + + + + sgmii2.hdoutp + + + + + sgmii2_lsm_status_s + sgmii2_lsm_status_s + + out + + + + sgmii2.lsm_status_s + + + + + sgmii2_pll_lol + sgmii2_pll_lol + + out + + + + sgmii2.pll_lol + + + + + sgmii2_rst_dual_c + sgmii2_rst_dual_c + + in + + + + sgmii2.rst_dual_c + + + + + sgmii2_rx_cdr_lol_s + sgmii2_rx_cdr_lol_s + + out + + + + sgmii2.rx_cdr_lol_s + + + + + sgmii2_rx_los_low_s + sgmii2_rx_los_low_s + + out + + + + sgmii2.rx_los_low_s + + + + + sgmii2_rx_pcs_rst_c + sgmii2_rx_pcs_rst_c + + in + + + + sgmii2.rx_pcs_rst_c + + + + + sgmii2_rx_pwrup_c + sgmii2_rx_pwrup_c + + in + + + + sgmii2.rx_pwrup_c + + + + + sgmii2_rx_serdes_rst_c + sgmii2_rx_serdes_rst_c + + in + + + + sgmii2.rx_serdes_rst_c + + + + + sgmii2_sci_en + sgmii2_sci_en + + in + + + + sgmii2.sci_en + + + + + sgmii2_sci_en_dual + sgmii2_sci_en_dual + + in + + + + sgmii3.sci_en_dual + + + + + sgmii2_sci_int + sgmii2_sci_int + + out + + + + sgmii3.sci_int + + + + + sgmii2_sci_rd + sgmii2_sci_rd + + in + + + + sgmii3.sci_rd + + + + + sgmii2_sci_sel + sgmii2_sci_sel + + in + + + + sgmii2.sci_sel + + + + + sgmii2_sci_sel_dual + sgmii2_sci_sel_dual + + in + + + + sgmii3.sci_sel_dual + + + + + sgmii2_sci_wrn + sgmii2_sci_wrn + + in + + + + sgmii3.sci_wrn + + + + + sgmii2_serdes_pdb + sgmii2_serdes_pdb + + in + + + + sgmii3.serdes_pdb + + + + + sgmii2_serdes_rst_dual_c + sgmii2_serdes_rst_dual_c + + in + + + + sgmii2.serdes_rst_dual_c + + + + + sgmii2_signal_detect_c + sgmii2_signal_detect_c + + in + + + + sgmii2.signal_detect_c + + + + + sgmii2_tx_pclk + sgmii2_tx_pclk + + out + + + + sgmii2.tx_pclk + + + + + sgmii2_tx_pcs_rst_c + sgmii2_tx_pcs_rst_c + + in + + + + sgmii2.tx_pcs_rst_c + + + + + sgmii2_tx_pwrup_c + sgmii2_tx_pwrup_c + + in + + + + sgmii2.tx_pwrup_c + + + + + sgmii2_tx_serdes_rst_c + sgmii2_tx_serdes_rst_c + + in + + + + sgmii2.tx_serdes_rst_c + + + + + sgmii2_txi_clk + sgmii2_txi_clk + + in + + + + sgmii2.txi_clk + + + + + sgmii3_ctc_del_s + sgmii3_ctc_del_s + + out + + + + sgmii3.ctc_del_s + + + + + sgmii3_ctc_ins_s + sgmii3_ctc_ins_s + + out + + + + sgmii3.ctc_ins_s + + + + + sgmii3_ctc_orun_s + sgmii3_ctc_orun_s + + out + + + + sgmii3.ctc_orun_s + + + + + sgmii3_ctc_urun_s + sgmii3_ctc_urun_s + + out + + + + sgmii3.ctc_urun_s + + + + + sgmii3_hdinn + sgmii3_hdinn + + in + + + + sgmii3.hdinn + + + + + sgmii3_hdinp + sgmii3_hdinp + + in + + + + sgmii3.hdinp + + + + + sgmii3_hdoutn + sgmii3_hdoutn + + out + + + + sgmii3.hdoutn + + + + + sgmii3_hdoutp + sgmii3_hdoutp + + out + + + + sgmii3.hdoutp + + + + + sgmii3_lsm_status_s + sgmii3_lsm_status_s + + out + + + + sgmii3.lsm_status_s + + + + + sgmii3_pll_refclki + sgmii3_pll_refclki + + in + + + + sgmii3.pll_refclki + + + + + sgmii3_rst_dual_c + sgmii3_rst_dual_c + + in + + + + sgmii3.rst_dual_c + + + + + sgmii3_rx_cdr_lol_s + sgmii3_rx_cdr_lol_s + + out + + + + sgmii3.rx_cdr_lol_s + + + + + sgmii3_rx_los_low_s + sgmii3_rx_los_low_s + + out + + + + sgmii3.rx_los_low_s + + + + + sgmii3_rx_pcs_rst_c + sgmii3_rx_pcs_rst_c + + in + + + + sgmii3.rx_pcs_rst_c + + + + + sgmii3_rx_pwrup_c + sgmii3_rx_pwrup_c + + in + + + + sgmii3.rx_pwrup_c + + + + + sgmii3_rx_serdes_rst_c + sgmii3_rx_serdes_rst_c + + in + + + + sgmii3.rx_serdes_rst_c + + + + + sgmii3_rxrefclk + sgmii3_rxrefclk + + in + + + + sgmii3.rxrefclk + + + + + sgmii3_sci_en + sgmii3_sci_en + + in + + + + sgmii3.sci_en + + + + + sgmii3_sci_sel + sgmii3_sci_sel + + in + + + + sgmii3.sci_sel + + + + + sgmii3_serdes_rst_dual_c + sgmii3_serdes_rst_dual_c + + in + + + + sgmii3.serdes_rst_dual_c + + + + + sgmii3_signal_detect_c + sgmii3_signal_detect_c + + in + + + + sgmii3.signal_detect_c + + + + + sgmii3_tx_pclk + sgmii3_tx_pclk + + out + + + + sgmii3.tx_pclk + + + + + sgmii3_tx_pcs_rst_c + sgmii3_tx_pcs_rst_c + + in + + + + sgmii3.tx_pcs_rst_c + + + + + sgmii3_tx_pwrup_c + sgmii3_tx_pwrup_c + + in + + + + sgmii3.tx_pwrup_c + + + + + sgmii3_tx_serdes_rst_c + sgmii3_tx_serdes_rst_c + + in + + + + sgmii3.tx_serdes_rst_c + + + + + sgmii3_txi_clk + sgmii3_txi_clk + + in + + + + sgmii3.txi_clk + + + + + sgmii0_rx_cv_err + sgmii0_rx_cv_err + + out + + 0 + 0 + + + + + sgmii0.rx_cv_err + + + + + sgmii0_rx_disp_err + sgmii0_rx_disp_err + + out + + 0 + 0 + + + + + sgmii0.rx_disp_err + + + + + sgmii0_rx_k + sgmii0_rx_k + + out + + 0 + 0 + + + + + sgmii0.rx_k + + + + + sgmii0_rxdata + sgmii0_rxdata + + out + + 7 + 0 + + + + + sgmii0.rxdata + + + + + sgmii0_sci_addr + sgmii0_sci_addr + + in + + 5 + 0 + + + + + sgmii0.sci_addr + + + + + sgmii0_sci_rddata + sgmii0_sci_rddata + + out + + 7 + 0 + + + + + sgmii0.sci_rddata + + + + + sgmii0_sci_wrdata + sgmii0_sci_wrdata + + in + + 7 + 0 + + + + + sgmii0.sci_wrdata + + + + + sgmii0_tx_disp_correct + sgmii0_tx_disp_correct + + in + + 0 + 0 + + + + + sgmii0.tx_disp_correct + + + + + sgmii0_tx_k + sgmii0_tx_k + + in + + 0 + 0 + + + + + sgmii0.tx_k + + + + + sgmii0_txdata + sgmii0_txdata + + in + + 7 + 0 + + + + + sgmii0.txdata + + + + + sgmii0_xmit + sgmii0_xmit + + in + + 0 + 0 + + + + + sgmii0.xmit + + + + + sgmii1_rx_cv_err + sgmii1_rx_cv_err + + out + + 0 + 0 + + + + + sgmii1.rx_cv_err + + + + + sgmii1_rx_disp_err + sgmii1_rx_disp_err + + out + + 0 + 0 + + + + + sgmii1.rx_disp_err + + + + + sgmii1_rx_k + sgmii1_rx_k + + out + + 0 + 0 + + + + + sgmii1.rx_k + + + + + sgmii1_rxdata + sgmii1_rxdata + + out + + 7 + 0 + + + + + sgmii1.rxdata + + + + + sgmii1_tx_disp_correct + sgmii1_tx_disp_correct + + in + + 0 + 0 + + + + + sgmii1.tx_disp_correct + + + + + sgmii1_tx_k + sgmii1_tx_k + + in + + 0 + 0 + + + + + sgmii1.tx_k + + + + + sgmii1_txdata + sgmii1_txdata + + in + + 7 + 0 + + + + + sgmii1.txdata + + + + + sgmii1_xmit + sgmii1_xmit + + in + + 0 + 0 + + + + + sgmii1.xmit + + + + + sgmii2_rx_cv_err + sgmii2_rx_cv_err + + out + + 0 + 0 + + + + + sgmii2.rx_cv_err + + + + + sgmii2_rx_disp_err + sgmii2_rx_disp_err + + out + + 0 + 0 + + + + + sgmii2.rx_disp_err + + + + + sgmii2_rx_k + sgmii2_rx_k + + out + + 0 + 0 + + + + + sgmii2.rx_k + + + + + sgmii2_rxdata + sgmii2_rxdata + + out + + 7 + 0 + + + + + sgmii2.rxdata + + + + + sgmii2_sci_addr + sgmii2_sci_addr + + in + + 5 + 0 + + + + + sgmii3.sci_addr + + + + + sgmii2_sci_rddata + sgmii2_sci_rddata + + out + + 7 + 0 + + + + + sgmii3.sci_rddata + + + + + sgmii2_sci_wrdata + sgmii2_sci_wrdata + + in + + 7 + 0 + + + + + sgmii3.sci_wrdata + + + + + sgmii2_tx_disp_correct + sgmii2_tx_disp_correct + + in + + 0 + 0 + + + + + sgmii2.tx_disp_correct + + + + + sgmii2_tx_k + sgmii2_tx_k + + in + + 0 + 0 + + + + + sgmii2.tx_k + + + + + sgmii2_txdata + sgmii2_txdata + + in + + 7 + 0 + + + + + sgmii2.txdata + + + + + sgmii2_xmit + sgmii2_xmit + + in + + 0 + 0 + + + + + sgmii2.xmit + + + + + sgmii3_rx_cv_err + sgmii3_rx_cv_err + + out + + 0 + 0 + + + + + sgmii3.rx_cv_err + + + + + sgmii3_rx_disp_err + sgmii3_rx_disp_err + + out + + 0 + 0 + + + + + sgmii3.rx_disp_err + + + + + sgmii3_rx_k + sgmii3_rx_k + + out + + 0 + 0 + + + + + sgmii3.rx_k + + + + + sgmii3_rxdata + sgmii3_rxdata + + out + + 7 + 0 + + + + + sgmii3.rxdata + + + + + sgmii3_tx_disp_correct + sgmii3_tx_disp_correct + + in + + 0 + 0 + + + + + sgmii3.tx_disp_correct + + + + + sgmii3_tx_k + sgmii3_tx_k + + in + + 0 + 0 + + + + + sgmii3.tx_k + + + + + sgmii3_txdata + sgmii3_txdata + + in + + 7 + 0 + + + + + sgmii3.txdata + + + + + sgmii3_xmit + sgmii3_xmit + + in + + 0 + 0 + + + + + sgmii3.xmit + + + + + + + LFE5UM-45F-8BG381C + synplify + 2017-06-09.17:06:27 + 2019-03-15.18:48:22 + 3.10.3.144 + Verilog + + false + false + false + false + false + false + false + false + false + false + false + + + + + + + + LATTICE + LOCAL + pcs + 1.0 + + + refclk0 + + Lattice Semiconductor Corporation + LEGACY + EXTREF + 1.1 + + + Diamond_Simulation + simulation + + ./refclk0/refclk0.v + verilogSource + + + + Diamond_Synthesis + synthesis + + ./refclk0/refclk0.v + verilogSource + + + + + + Configuration + none + ${sbp_path}/${instance}/generate_core.tcl + CONFIG + + + CreateNGD + none + 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sgmii3_signal_detect_c + + + + + sgmii3_tx_pclk + sgmii3_tx_pclk + + + + + sgmii3_tx_pcs_rst_c + sgmii3_tx_pcs_rst_c + + + + + sgmii3_tx_pwrup_c + sgmii3_tx_pwrup_c + + + + + sgmii3_tx_serdes_rst_c + sgmii3_tx_serdes_rst_c + + + + + sgmii3_txi_clk + sgmii3_txi_clk + + + + + sgmii0_rx_cv_err + sgmii0_rx_cv_err + + + + + sgmii0_rx_cv_err[0] + sgmii0_rx_cv_err[0] + + + + + sgmii0_rx_disp_err + sgmii0_rx_disp_err + + + + + sgmii0_rx_disp_err[0] + sgmii0_rx_disp_err[0] + + + + + sgmii0_rx_k + sgmii0_rx_k + + + + + sgmii0_rx_k[0] + sgmii0_rx_k[0] + + + + + sgmii0_rxdata + sgmii0_rxdata + + + + + sgmii0_rxdata[0] + sgmii0_rxdata[0] + + + + + sgmii0_rxdata[1] + sgmii0_rxdata[1] + + + + + sgmii0_rxdata[2] + sgmii0_rxdata[2] + + + + + sgmii0_rxdata[3] + sgmii0_rxdata[3] + + + + + sgmii0_rxdata[4] + sgmii0_rxdata[4] + + + + + sgmii0_rxdata[5] + sgmii0_rxdata[5] + + + + + sgmii0_rxdata[6] + sgmii0_rxdata[6] + + + + + sgmii0_rxdata[7] + sgmii0_rxdata[7] + + + + + sgmii0_sci_addr + sgmii0_sci_addr + + + + + sgmii0_sci_addr[0] + sgmii0_sci_addr[0] + + + + + sgmii0_sci_addr[1] + sgmii0_sci_addr[1] + + + + + sgmii0_sci_addr[2] + sgmii0_sci_addr[2] + + + + + sgmii0_sci_addr[3] + sgmii0_sci_addr[3] + + + + + sgmii0_sci_addr[4] + sgmii0_sci_addr[4] + + + + + sgmii0_sci_addr[5] + sgmii0_sci_addr[5] + + + + + sgmii0_sci_rddata + sgmii0_sci_rddata + + + + + sgmii0_sci_rddata[0] + sgmii0_sci_rddata[0] + + + + + sgmii0_sci_rddata[1] + sgmii0_sci_rddata[1] + + + + + sgmii0_sci_rddata[2] + sgmii0_sci_rddata[2] + + + + + sgmii0_sci_rddata[3] + sgmii0_sci_rddata[3] + + + + + sgmii0_sci_rddata[4] + sgmii0_sci_rddata[4] + + + + + sgmii0_sci_rddata[5] + sgmii0_sci_rddata[5] + + + + + sgmii0_sci_rddata[6] + sgmii0_sci_rddata[6] + + + + + sgmii0_sci_rddata[7] + sgmii0_sci_rddata[7] + + + + + sgmii0_sci_wrdata + sgmii0_sci_wrdata + + + + + sgmii0_sci_wrdata[0] + sgmii0_sci_wrdata[0] + + + + + sgmii0_sci_wrdata[1] + sgmii0_sci_wrdata[1] + + + + + sgmii0_sci_wrdata[2] + sgmii0_sci_wrdata[2] + + + + + sgmii0_sci_wrdata[3] + sgmii0_sci_wrdata[3] + + + + + sgmii0_sci_wrdata[4] + sgmii0_sci_wrdata[4] + + + + + sgmii0_sci_wrdata[5] + sgmii0_sci_wrdata[5] + + + + + sgmii0_sci_wrdata[6] + sgmii0_sci_wrdata[6] + + + + + sgmii0_sci_wrdata[7] + sgmii0_sci_wrdata[7] + + + + + sgmii0_tx_disp_correct + sgmii0_tx_disp_correct + + + + + sgmii0_tx_disp_correct[0] + sgmii0_tx_disp_correct[0] + + + + + sgmii0_tx_k + sgmii0_tx_k + + + + + sgmii0_tx_k[0] + sgmii0_tx_k[0] + + + + + sgmii0_txdata + sgmii0_txdata + + + + + sgmii0_txdata[0] + sgmii0_txdata[0] + + + + + sgmii0_txdata[1] + sgmii0_txdata[1] + + + + + sgmii0_txdata[2] + sgmii0_txdata[2] + + + + + sgmii0_txdata[3] + sgmii0_txdata[3] + + + + + sgmii0_txdata[4] + sgmii0_txdata[4] + + + + + sgmii0_txdata[5] + sgmii0_txdata[5] + + + + + sgmii0_txdata[6] + sgmii0_txdata[6] + + + + + sgmii0_txdata[7] + sgmii0_txdata[7] + + + + + sgmii0_xmit + sgmii0_xmit + + + + + sgmii0_xmit[0] + sgmii0_xmit[0] + + + + + sgmii1_rx_cv_err + sgmii1_rx_cv_err + + + + + sgmii1_rx_cv_err[0] + sgmii1_rx_cv_err[0] + + + + + sgmii1_rx_disp_err + sgmii1_rx_disp_err + + + + + sgmii1_rx_disp_err[0] + sgmii1_rx_disp_err[0] + + + + + sgmii1_rx_k + sgmii1_rx_k + + + + + sgmii1_rx_k[0] + sgmii1_rx_k[0] + + + + + sgmii1_rxdata + sgmii1_rxdata + + + + + sgmii1_rxdata[0] + sgmii1_rxdata[0] + + + + + sgmii1_rxdata[1] + sgmii1_rxdata[1] + + + + + sgmii1_rxdata[2] + sgmii1_rxdata[2] + + + + + sgmii1_rxdata[3] + sgmii1_rxdata[3] + + + + + sgmii1_rxdata[4] + sgmii1_rxdata[4] + + + + + sgmii1_rxdata[5] + sgmii1_rxdata[5] + + + + + sgmii1_rxdata[6] + sgmii1_rxdata[6] + + + + + sgmii1_rxdata[7] + sgmii1_rxdata[7] + + + + + sgmii1_tx_disp_correct + sgmii1_tx_disp_correct + + + + + sgmii1_tx_disp_correct[0] + sgmii1_tx_disp_correct[0] + + + + + sgmii1_tx_k + sgmii1_tx_k + + + + + sgmii1_tx_k[0] + sgmii1_tx_k[0] + + + + + sgmii1_txdata + sgmii1_txdata + + + + + sgmii1_txdata[0] + sgmii1_txdata[0] + + + + + sgmii1_txdata[1] + sgmii1_txdata[1] + + + + + sgmii1_txdata[2] + sgmii1_txdata[2] + + + + + sgmii1_txdata[3] + sgmii1_txdata[3] + + + + + sgmii1_txdata[4] + sgmii1_txdata[4] + + + + + sgmii1_txdata[5] + sgmii1_txdata[5] + + + + + sgmii1_txdata[6] + sgmii1_txdata[6] + + + + + sgmii1_txdata[7] + sgmii1_txdata[7] + + + + + sgmii1_xmit + sgmii1_xmit + + + + + sgmii1_xmit[0] + sgmii1_xmit[0] + + + + + sgmii2_rx_cv_err + sgmii2_rx_cv_err + + + + + sgmii2_rx_cv_err[0] + sgmii2_rx_cv_err[0] + + + + + sgmii2_rx_disp_err + sgmii2_rx_disp_err + + + + + sgmii2_rx_disp_err[0] + sgmii2_rx_disp_err[0] + + + + + sgmii2_rx_k + sgmii2_rx_k + + + + + sgmii2_rx_k[0] + sgmii2_rx_k[0] + + + + + sgmii2_rxdata + sgmii2_rxdata + + + + + sgmii2_rxdata[0] + sgmii2_rxdata[0] + + + + + sgmii2_rxdata[1] + sgmii2_rxdata[1] + + + + + sgmii2_rxdata[2] + sgmii2_rxdata[2] + + + + + sgmii2_rxdata[3] + sgmii2_rxdata[3] + + + + + sgmii2_rxdata[4] + sgmii2_rxdata[4] + + + + + sgmii2_rxdata[5] + sgmii2_rxdata[5] + + + + + sgmii2_rxdata[6] + sgmii2_rxdata[6] + + + + + sgmii2_rxdata[7] + sgmii2_rxdata[7] + + + + + sgmii2_sci_addr + sgmii2_sci_addr + + + + + sgmii2_sci_addr[0] + sgmii2_sci_addr[0] + + + + + sgmii2_sci_addr[1] + sgmii2_sci_addr[1] + + + + + sgmii2_sci_addr[2] + sgmii2_sci_addr[2] + + + + + sgmii2_sci_addr[3] + sgmii2_sci_addr[3] + + + + + sgmii2_sci_addr[4] + sgmii2_sci_addr[4] + + + + + sgmii2_sci_addr[5] + sgmii2_sci_addr[5] + + + + + sgmii2_sci_rddata + sgmii2_sci_rddata + + + + + sgmii2_sci_rddata[0] + sgmii2_sci_rddata[0] + + + + + sgmii2_sci_rddata[1] + sgmii2_sci_rddata[1] + + + + + sgmii2_sci_rddata[2] + sgmii2_sci_rddata[2] + + + + + sgmii2_sci_rddata[3] + sgmii2_sci_rddata[3] + + + + + sgmii2_sci_rddata[4] + sgmii2_sci_rddata[4] + + + + + sgmii2_sci_rddata[5] + sgmii2_sci_rddata[5] + + + + + sgmii2_sci_rddata[6] + sgmii2_sci_rddata[6] + + + + + sgmii2_sci_rddata[7] + sgmii2_sci_rddata[7] + + + + + sgmii2_sci_wrdata + sgmii2_sci_wrdata + + + + + sgmii2_sci_wrdata[0] + sgmii2_sci_wrdata[0] + + + + + sgmii2_sci_wrdata[1] + sgmii2_sci_wrdata[1] + + + + + sgmii2_sci_wrdata[2] + sgmii2_sci_wrdata[2] + + + + + sgmii2_sci_wrdata[3] + sgmii2_sci_wrdata[3] + + + + + sgmii2_sci_wrdata[4] + sgmii2_sci_wrdata[4] + + + + + sgmii2_sci_wrdata[5] + sgmii2_sci_wrdata[5] + + + + + sgmii2_sci_wrdata[6] + sgmii2_sci_wrdata[6] + + + + + sgmii2_sci_wrdata[7] + sgmii2_sci_wrdata[7] + + + + + sgmii2_tx_disp_correct + sgmii2_tx_disp_correct + + + + + sgmii2_tx_disp_correct[0] + sgmii2_tx_disp_correct[0] + + + + + sgmii2_tx_k + sgmii2_tx_k + + + + + sgmii2_tx_k[0] + sgmii2_tx_k[0] + + + + + sgmii2_txdata + sgmii2_txdata + + + + + sgmii2_txdata[0] + sgmii2_txdata[0] + + + + + sgmii2_txdata[1] + sgmii2_txdata[1] + + + + + sgmii2_txdata[2] + sgmii2_txdata[2] + + + + + sgmii2_txdata[3] + sgmii2_txdata[3] + + + + + sgmii2_txdata[4] + sgmii2_txdata[4] + + + + + sgmii2_txdata[5] + sgmii2_txdata[5] + + + + + sgmii2_txdata[6] + sgmii2_txdata[6] + + + + + sgmii2_txdata[7] + sgmii2_txdata[7] + + + + + sgmii2_xmit + sgmii2_xmit + + + + + sgmii2_xmit[0] + sgmii2_xmit[0] + + + + + sgmii3_rx_cv_err + sgmii3_rx_cv_err + + + + + sgmii3_rx_cv_err[0] + sgmii3_rx_cv_err[0] + + + + + sgmii3_rx_disp_err + sgmii3_rx_disp_err + + + + + sgmii3_rx_disp_err[0] + sgmii3_rx_disp_err[0] + + + + + sgmii3_rx_k + sgmii3_rx_k + + + + + sgmii3_rx_k[0] + sgmii3_rx_k[0] + + + + + sgmii3_rxdata + sgmii3_rxdata + + + + + sgmii3_rxdata[0] + sgmii3_rxdata[0] + + + + + sgmii3_rxdata[1] + sgmii3_rxdata[1] + + + + + sgmii3_rxdata[2] + sgmii3_rxdata[2] + + + + + sgmii3_rxdata[3] + sgmii3_rxdata[3] + + + + + sgmii3_rxdata[4] + sgmii3_rxdata[4] + + + + + sgmii3_rxdata[5] + sgmii3_rxdata[5] + + + + + sgmii3_rxdata[6] + sgmii3_rxdata[6] + + + + + sgmii3_rxdata[7] + sgmii3_rxdata[7] + + + + + sgmii3_tx_disp_correct + sgmii3_tx_disp_correct + + + + + sgmii3_tx_disp_correct[0] + sgmii3_tx_disp_correct[0] + + + + + sgmii3_tx_k + sgmii3_tx_k + + + + + sgmii3_tx_k[0] + sgmii3_tx_k[0] + + + + + sgmii3_txdata + sgmii3_txdata + + + + + sgmii3_txdata[0] + sgmii3_txdata[0] + + + + + sgmii3_txdata[1] + sgmii3_txdata[1] + + + + + sgmii3_txdata[2] + sgmii3_txdata[2] + + + + + sgmii3_txdata[3] + sgmii3_txdata[3] + + + + + sgmii3_txdata[4] + sgmii3_txdata[4] + + + + + sgmii3_txdata[5] + sgmii3_txdata[5] + + + + + sgmii3_txdata[6] + sgmii3_txdata[6] + + + + + sgmii3_txdata[7] + sgmii3_txdata[7] + + + + + sgmii3_xmit + sgmii3_xmit + + + + + sgmii3_xmit[0] + sgmii3_xmit[0] + + + + + + -- cgit v1.2.3-8-gadcc