From f5ad249daef5d214e9dfcf2a8111f7ccdb00a6ef Mon Sep 17 00:00:00 2001
From: mindchasers <privateisland@mindchasers.com>
Date: Thu, 19 Nov 2020 22:26:59 -0500
Subject: lattice: clean up project files to match latest top

---
 .../lattice/ecp5um/boards/darsena/darsena_v02.lpf        | 16 ++++++++--------
 manufacturer/lattice/ecp5um/privateisland.ldf            | 11 +----------
 .../lattice/ecp5um/programming/local_background.xcf      |  8 ++++----
 manufacturer/lattice/ecp5um/programming/local_jtag.xcf   |  7 +++----
 4 files changed, 16 insertions(+), 26 deletions(-)

diff --git a/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf b/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf
index 98c999b..3633976 100644
--- a/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf
+++ b/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf
@@ -24,10 +24,10 @@ BANK 8 VCCIO 3.3 V;
 LOCATE COMP "rstn" SITE "F1" ;// GSRN ping
 LOCATE COMP "i2c_scl" SITE "B1" ;
 LOCATE COMP "i2c_sda" SITE "C1" ;
-LOCATE COMP "fpga_spics" SITE "H1" ;
-LOCATE COMP "fpga_mclk" SITE "H2" ;
-LOCATE COMP "fpga_mosi" SITE "G1" ;
-LOCATE COMP "fpga_miso" SITE "F2" ;
+LOCATE COMP "spi_cs" SITE "H1" ;
+LOCATE COMP "spi_clk" SITE "H2" ;
+LOCATE COMP "spi_mosi" SITE "G1" ;
+LOCATE COMP "spi_miso" SITE "F2" ;
 LOCATE COMP "fpga_int" SITE "E2" ;
 LOCATE COMP "uart_txd" SITE "D2" ;
 LOCATE COMP "uart_rxd" SITE "E1" ;
@@ -121,7 +121,7 @@ IOBUF PORT "ard_txd1" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "ard_txd2" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "ard_txd3" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "phy_mdc" IO_TYPE=LVCMOS33 ;
-IOBUF PORT "fpga_miso" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
+IOBUF PORT "spi_miso" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
 IOBUF PORT "pe0" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "pe1" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "pe3" IO_TYPE=LVCMOS33 ;
@@ -149,6 +149,6 @@ IOBUF PORT "fpga_jtag_e" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "fpga_gpio" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "phy1_intn" IO_TYPE=LVCMOS33 ;
 IOBUF PORT "phy0_intn" IO_TYPE=LVCMOS33 ;
-IOBUF PORT "fpga_mclk" IO_TYPE=LVCMOS33 ;
-IOBUF PORT "fpga_spics" IO_TYPE=LVCMOS33 ;
-IOBUF PORT "fpga_mosi" IO_TYPE=LVCMOS33 ;
+IOBUF PORT "spi_clk" IO_TYPE=LVCMOS33 ;
+IOBUF PORT "spi_cs" IO_TYPE=LVCMOS33 ;
+IOBUF PORT "spi_mosi" IO_TYPE=LVCMOS33 ;
diff --git a/manufacturer/lattice/ecp5um/privateisland.ldf b/manufacturer/lattice/ecp5um/privateisland.ldf
index 0d13cc9..803a037 100644
--- a/manufacturer/lattice/ecp5um/privateisland.ldf
+++ b/manufacturer/lattice/ecp5um/privateisland.ldf
@@ -11,7 +11,7 @@
             <Option name="top" value="top"/>
         </Options>
         <Source name="../../../source/top.v" type="Verilog" type_short="Verilog">
-            <Options/>
+            <Options top_module="top"/>
         </Source>
         <Source name="../../../source/bin_to_ascii.v" type="Verilog" type_short="Verilog">
             <Options/>
@@ -34,9 +34,6 @@
         <Source name="../../../source/drop_fifo.v" type="Verilog" type_short="Verilog">
             <Options/>
         </Source>
-        <Source name="../../../source/drop2_fifo.v" type="Verilog" type_short="Verilog">
-            <Options/>
-        </Source>
         <Source name="../../../source/ethernet_params.v" type="Verilog" type_short="Verilog" excluded="TRUE">
             <Options/>
         </Source>
@@ -88,12 +85,6 @@
         <Source name="../../../source/sync_fifo.v" type="Verilog" type_short="Verilog">
             <Options/>
         </Source>
-        <Source name="../../../source/sync4_fifo.v" type="Verilog" type_short="Verilog">
-            <Options/>
-        </Source>
-        <Source name="../../../source/sync2_fifo.v" type="Verilog" type_short="Verilog">
-            <Options/>
-        </Source>
         <Source name="clarity/pcs/pcs.sbx" type="sbx" type_short="SBX">
             <Options/>
         </Source>
diff --git a/manufacturer/lattice/ecp5um/programming/local_background.xcf b/manufacturer/lattice/ecp5um/programming/local_background.xcf
index 7a92104..082d1a9 100644
--- a/manufacturer/lattice/ecp5um/programming/local_background.xcf
+++ b/manufacturer/lattice/ecp5um/programming/local_background.xcf
@@ -1,6 +1,6 @@
 <?xml version='1.0' encoding='utf-8' ?>
 <!DOCTYPE		ispXCF	SYSTEM	"IspXCF.dtd" >
-<ispXCF version="3.10.0">
+<ispXCF version="3.11.1">
 	<Comment></Comment>
 	<Chain>
 		<Comm>JTAG</Comm>
@@ -17,8 +17,8 @@
 				<BScanLen>1</BScanLen>
 				<BScanVal>0</BScanVal>
 			</Bypass>
-			<File>C:/projects/lattice/privateisland/impl1/privateisland_impl1.bit</File>
-			<FileTime>04/30/19 20:41:46</FileTime>
+			<File>C:/Projects/lattice/mindchasers/privateisland/manufacturer/lattice/ecp5um/impl1/privateisland_impl1.bit</File>
+			<FileTime>11/19/20 22:20:41</FileTime>
 			<JedecChecksum>N/A</JedecChecksum>
 			<Operation>SPI Flash Erase,Program,Verify</Operation>
 			<Option>
@@ -64,7 +64,7 @@
 					<IDCode>0x18</IDCode>
 					<Package>6*5mm 8-pin W-PDFN</Package>
 					<Operation>SPI Flash Erase,Program,Verify</Operation>
-					<File>C:/projects/lattice/privateisland/impl1/privateisland_impl1.bit</File>
+					<File>C:/Projects/lattice/mindchasers/privateisland/manufacturer/lattice/ecp5um/impl1/privateisland_impl1.bit</File>
 					<AddressBase>0x00000000</AddressBase>
 					<EndAddress>0x000F0000</EndAddress>
 					<DeviceSize>128</DeviceSize>
diff --git a/manufacturer/lattice/ecp5um/programming/local_jtag.xcf b/manufacturer/lattice/ecp5um/programming/local_jtag.xcf
index 5fde840..92dbacd 100644
--- a/manufacturer/lattice/ecp5um/programming/local_jtag.xcf
+++ b/manufacturer/lattice/ecp5um/programming/local_jtag.xcf
@@ -1,6 +1,6 @@
 <?xml version='1.0' encoding='utf-8' ?>
 <!DOCTYPE		ispXCF	SYSTEM	"IspXCF.dtd" >
-<ispXCF version="3.10.0">
+<ispXCF version="3.11.1">
 	<Comment></Comment>
 	<Chain>
 		<Comm>JTAG</Comm>
@@ -18,9 +18,8 @@
 				<BScanLen>1</BScanLen>
 				<BScanVal>0</BScanVal>
 			</Bypass>
-			<File>C:/projects/lattice/privateisland/impl1/privateisland_impl1.bit</File>
-			<FileTime>05/01/19 16:59:47</FileTime>
-			<JedecChecksum>N/A</JedecChecksum>
+			<File>C:/Projects/lattice/mindchasers/privateisland/manufacturer/lattice/ecp5um/impl1/privateisland_impl1.bit</File>
+			<FileTime>11/19/20 22:20:41</FileTime>
 			<Operation>Fast Program</Operation>
 			<Option>
 				<SVFVendor>JTAG STANDARD</SVFVendor>
-- 
cgit v1.2.3-8-gadcc