From da76ee103bf89c28c7d6027371e4a420ada41932 Mon Sep 17 00:00:00 2001 From: mindchasers Date: Mon, 16 Nov 2020 13:59:15 -0500 Subject: project: rename sim folder, update README --- README | 26 -------------------------- README.txt | 19 +++++++++++++++++++ simulation/README.txt | 3 +++ testbenches/README | 3 --- 4 files changed, 22 insertions(+), 29 deletions(-) delete mode 100644 README create mode 100644 README.txt create mode 100644 simulation/README.txt delete mode 100644 testbenches/README diff --git a/README b/README deleted file mode 100644 index 90b78b4..0000000 --- a/README +++ /dev/null @@ -1,26 +0,0 @@ -# privateisland - -Open Source FPGA Network Processor for Security, IoT, and Control. - -See LICENSE in this folder and reference to LICENSE in header of each Verilog source file. - -Contributors must agree to Contributor License Agreement (to be added). - -Brief Overview: - -FPGAs are amazing! - -Multi-port Etherent MAC, network switch, classifier, filter and more. - -Define the operation of your own device. Do things truly in parallel. See packets like you never thought possible. - -The initial version of this project targets a Lattice ECP5UM FPGA. - -Project is Veriog only. Test benches are Verilog / System Verilog and will be added to project soon. - -Build bit image using Lattice Diamond. Project files are based on Windws 10 at C:\projects\lattice\privateisland\ - -The FPGA architecture assumes an external micro controller / processor. The Darsena board uses an NXP K02. Test code for the K02 will be available in a separate github repo. - -Please see further documentation at https://mindchasers.com/dev/private-island and additional related documentation referenced from this page. - diff --git a/README.txt b/README.txt new file mode 100644 index 0000000..aaf0bd1 --- /dev/null +++ b/README.txt @@ -0,0 +1,19 @@ +# privateisland + +Open Source FPGA Network Processor for Security, IoT, Video bridging, and Control. + +See LICENSE in this folder and reference to LICENSE in header of each Verilog source file. + +Contributors must agree to Contributor License Agreement (to be added). + +Brief Overview: + +FPGAs are amazing! + +Multi-port Etherent MAC, network switch, classifier, filter and more. + +Define the operation of your own device. Do things truly in parallel. See packets like you never thought possible. + +The initial version of this project targets a Lattice ECP5UM FPGA, and support for more devices are being added. + +Please see further documentation at https://mindchasers.com/dev/private-island diff --git a/simulation/README.txt b/simulation/README.txt new file mode 100644 index 0000000..0c38a5f --- /dev/null +++ b/simulation/README.txt @@ -0,0 +1,3 @@ +System Verilog Test Benches + +Will be added soon diff --git a/testbenches/README b/testbenches/README deleted file mode 100644 index 0c38a5f..0000000 --- a/testbenches/README +++ /dev/null @@ -1,3 +0,0 @@ -System Verilog Test Benches - -Will be added soon -- cgit v1.2.3-8-gadcc