From 9a616927d7095d7afef9684c5569ab233c59fdcb Mon Sep 17 00:00:00 2001 From: mindchasers Date: Tue, 2 Mar 2021 12:18:16 -0500 Subject: lpf: use GPIO for directly instead of specific shield I/O names and general clean up --- .../lattice/ecp5um/boards/darsena/darsena_v02.lpf | 47 ++++++++-------------- 1 file changed, 17 insertions(+), 30 deletions(-) diff --git a/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf b/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf index 3633976..af1c24e 100644 --- a/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf +++ b/manufacturer/lattice/ecp5um/boards/darsena/darsena_v02.lpf @@ -1,9 +1,5 @@ -rvl_alias "clk_10" "clk_10"; -RVL_ALIAS "refclko" "refclko"; -RVL_ALIAS "refclko" "refclko"; -RVL_ALIAS "refclko" "refclko"; ######################################### -# versa.lpf +# darsena_v02.lpf ######################################### FREQUENCY 125.000000 MHz; FREQUENCY NET "pcs_pclk" 125.000000 MHz PAR_ADJ 25.000000 ; @@ -36,13 +32,11 @@ LOCATE COMP "led[1]" SITE "M20" ; LOCATE COMP "led[2]" SITE "M19" ; // PHY LOCATE COMP "phy_mdc" SITE "J1" ; -// PHY0 LOCATE COMP "phy0_resetn" SITE "K2" ; LOCATE COMP "phy0_mdio" SITE "L2" ; LOCATE COMP "phy0_intn" SITE "K1" ; LOCATE COMP "phy0_gpio[0]" SITE "M1" ; LOCATE COMP "phy0_gpio[1]" SITE "L1" ; -// PHY1 LOCATE COMP "phy1_resetn" SITE "N20" ; LOCATE COMP "phy1_mdio" SITE "U20" ; LOCATE COMP "phy1_intn" SITE "U19" ; @@ -66,16 +60,9 @@ LOCATE COMP "pe5" SITE "B4" ; LOCATE COMP "pg5" SITE "A3" ; LOCATE COMP "ph3" SITE "A2" ; LOCATE COMP "ph4" SITE "B2" ; - -// PHY2 - -LOCATE COMP "phy2_mdc" SITE "C20" ; -LOCATE COMP "phy2_mdio" SITE "D19" ; -LOCATE COMP "phy2_resetn" SITE "D20" ; - -//LOCATE COMP "pa[0]" SITE "C20" ; -//LOCATE COMP "pa[1]" SITE "D19" ; -//LOCATE COMP "pa[2]" SITE "D20" ; +LOCATE COMP "pa[0]" SITE "C20" ; # phy2_mdc +LOCATE COMP "pa[1]" SITE "D19" ; # phy2_mdio +LOCATE COMP "pa[2]" SITE "D20" ; # phy2_resetn LOCATE COMP "pa[3]" SITE "E19" ; LOCATE COMP "pa[4]" SITE "E20" ; LOCATE COMP "pa[5]" SITE "F19" ; @@ -99,15 +86,15 @@ VOLTAGE 1.045 V; USERCODE BIN "00000000000000000000000000000000" ; BLOCK JTAGPATHS ; IOBUF PORT "rstn" IO_TYPE=LVCMOS33 ; -IOBUF PORT "phy2_mdc" IO_TYPE=LVCMOS33 ; IOBUF PORT "fpga_int" IO_TYPE=LVCMOS33 ; -IOBUF PORT "phy2_resetn" IO_TYPE=LVCMOS33 ; +#IOBUF PORT "phy2_resetn" IO_TYPE=LVCMOS33 ; +#IOBUF PORT "phy2_mdc" IO_TYPE=LVCMOS33 ; +#IOBUF PORT "phy2_mdio" IO_TYPE=LVCMOS33 PULLMODE=UP ; IOBUF PORT "phy0_resetn" IO_TYPE=LVCMOS33 ; IOBUF PORT "phy1_resetn" IO_TYPE=LVCMOS33 ; IOBUF PORT "led[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ; IOBUF PORT "led[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ; IOBUF PORT "led[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ; -IOBUF PORT "phy2_mdio" IO_TYPE=LVCMOS33 PULLMODE=UP ; IOBUF PORT "phy0_mdio" IO_TYPE=LVCMOS33 PULLMODE=UP OPENDRAIN=OFF ; IOBUF PORT "phy1_mdio" IO_TYPE=LVCMOS33 PULLMODE=UP ; IOBUF PORT "ard_sda" IO_TYPE=LVCMOS33 ; @@ -131,16 +118,16 @@ IOBUF PORT "pg5" IO_TYPE=LVCMOS33 ; IOBUF PORT "ph3" IO_TYPE=LVCMOS33 ; IOBUF PORT "ph4" IO_TYPE=LVCMOS33 ; -//IOBUF PORT "pa[0]" IO_TYPE=LVCMOS33 ; -//IOBUF PORT "pa[1]" IO_TYPE=LVCMOS33 ; -//IOBUF PORT "pa[2]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[3]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[4]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[5]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[6]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[7]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[8]" IO_TYPE=LVCMOS33 ; -IOBUF PORT "pa[9]" IO_TYPE=LVCMOS33 ; +IOBUF PORT "pa[0]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[1]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[2]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[3]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[4]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[5]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[6]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[7]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[8]" IO_TYPE=LVCMOS33 PULLMODE=UP ; +IOBUF PORT "pa[9]" IO_TYPE=LVCMOS33 PULLMODE=UP ; # V02 IOBUF PORT "ftdi_tck_txd" IO_TYPE=LVCMOS33 ; -- cgit v1.2.3-8-gadcc