/*********************************************************************************************************************** * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file * will be overwritten if the respective MCUXpresso Config Tools is used to update this file. **********************************************************************************************************************/ #ifndef _PIN_MUX_H_ #define _PIN_MUX_H_ /*! * @addtogroup pin_mux * @{ */ /*********************************************************************************************************************** * API **********************************************************************************************************************/ #if defined(__cplusplus) extern "C" { #endif /*! * @brief Calls initialization functions. * */ void BOARD_InitBootPins(void); #define SOPT5_UART0TXSRC_UART_TX 0x00u /*!<@brief UART 0 transmit data source select: UART0_TX pin */ /*! @name PORTE25 (number 11), PB6 @{ */ #define BOARD_INITPINS_PB6_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */ #define BOARD_INITPINS_PB6_PORT PORTE /*!<@brief PORT device name: PORTE */ #define BOARD_INITPINS_PB6_PIN 25U /*!<@brief PORTE pin index: 25 */ /* @} */ /*! @name PORTD7 (number 32), UART_TX @{ */ #define BOARD_INITPINS_UART_TX_PORT PORTD /*!<@brief PORT device name: PORTD */ #define BOARD_INITPINS_UART_TX_PIN 7U /*!<@brief PORTD pin index: 7 */ /* @} */ /*! @name PORTD6 (number 31), UART_RX @{ */ #define BOARD_INITPINS_UART_RX_PORT PORTD /*!<@brief PORT device name: PORTD */ #define BOARD_INITPINS_UART_RX_PIN 6U /*!<@brief PORTD pin index: 6 */ /* @} */ /*! @name PORTA4 (number 16), PMIC_INTN @{ */ #define BOARD_INITPINS_PMIC_INTN_PORT PORTA /*!<@brief PORT device name: PORTA */ #define BOARD_INITPINS_PMIC_INTN_PIN 4U /*!<@brief PORTA pin index: 4 */ /* @} */ /*! @name PORTA18 (number 17), PMIC_DCDC_E @{ */ #define BOARD_INITPINS_PMIC_DCDC_E_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ #define BOARD_INITPINS_PMIC_DCDC_E_PORT PORTA /*!<@brief PORT device name: PORTA */ #define BOARD_INITPINS_PMIC_DCDC_E_PIN 18U /*!<@brief PORTA pin index: 18 */ /* @} */ /*! @name RESET_b (number 19), UC_RESETN @{ */ /* @} */ /*! @name PORTB0 (number 20), FCFG_PGMN @{ */ #define BOARD_INITPINS_FCFG_PGMN_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ #define BOARD_INITPINS_FCFG_PGMN_PORT PORTB /*!<@brief PORT device name: PORTB */ #define BOARD_INITPINS_FCFG_PGMN_PIN 0U /*!<@brief PORTB pin index: 0 */ /* @} */ /*! @name PORTB1 (number 21), FCFG_DONE @{ */ #define BOARD_INITPINS_FCFG_DONE_GPIO GPIOB /*!<@brief GPIO device name: GPIOB */ #define BOARD_INITPINS_FCFG_DONE_PORT PORTB /*!<@brief PORT device name: PORTB */ #define BOARD_INITPINS_FCFG_DONE_PIN 1U /*!<@brief PORTB pin index: 1 */ /* @} */ /*! @name PORTC4 (number 25), SPI0_PCS @{ */ #define BOARD_INITPINS_SPI_PCS_PORT PORTC /*!<@brief PORT device name: PORTC */ #define BOARD_INITPINS_SPI_PCS_PIN 4U /*!<@brief PORTC pin index: 4 */ /* @} */ /*! @name PORTD4 (number 29), FPGA_RESETN @{ */ #define BOARD_INITPINS_FPGA_RESETN_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ #define BOARD_INITPINS_FPGA_RESETN_PORT PORTD /*!<@brief PORT device name: PORTD */ #define BOARD_INITPINS_FPGA_RESETN_PIN 4U /*!<@brief PORTD pin index: 4 */ /* @} */ /*! @name PORTD5 (number 30), FPGA_INT @{ */ #define BOARD_INITPINS_FPGA_INT_GPIO GPIOD /*!<@brief GPIO device name: GPIOD */ #define BOARD_INITPINS_FPGA_INT_PORT PORTD /*!<@brief PORT device name: PORTD */ #define BOARD_INITPINS_FPGA_INT_PIN 5U /*!<@brief PORTD pin index: 5 */ /* @} */ /*! @name PORTC5 (number 26), SPI_SCLK @{ */ #define BOARD_INITPINS_SPI_SCLK_PORT PORTC /*!<@brief PORT device name: PORTC */ #define BOARD_INITPINS_SPI_SCLK_PIN 5U /*!<@brief PORTC pin index: 5 */ /* @} */ /*! @name PORTC6 (number 27), SPI_MOSI @{ */ #define BOARD_INITPINS_SPI_MOSI_PORT PORTC /*!<@brief PORT device name: PORTC */ #define BOARD_INITPINS_SPI_MOSI_PIN 6U /*!<@brief PORTC pin index: 6 */ /* @} */ /*! @name PORTC7 (number 28), SPI_MISO @{ */ #define BOARD_INITPINS_SPI_MISO_PORT PORTC /*!<@brief PORT device name: PORTC */ #define BOARD_INITPINS_SPI_MISO_PIN 7U /*!<@brief PORTC pin index: 7 */ /* @} */ /*! @name PORTE19 (number 6), I2C_SCL @{ */ #define BOARD_INITPINS_I2C_SCL_PORT PORTE /*!<@brief PORT device name: PORTE */ #define BOARD_INITPINS_I2C_SCL_PIN 19U /*!<@brief PORTE pin index: 19 */ /* @} */ /*! @name PORTE24 (number 10), PB7 @{ */ #define BOARD_INITPINS_PB7_GPIO GPIOE /*!<@brief GPIO device name: GPIOE */ #define BOARD_INITPINS_PB7_PORT PORTE /*!<@brief PORT device name: PORTE */ #define BOARD_INITPINS_PB7_PIN 24U /*!<@brief PORTE pin index: 24 */ /* @} */ /*! @name PORTA19 (number 18), PMIC_LDO_E @{ */ #define BOARD_INITPINS_PMIC_LDO_E_GPIO GPIOA /*!<@brief GPIO device name: GPIOA */ #define BOARD_INITPINS_PMIC_LDO_E_PORT PORTA /*!<@brief PORT device name: PORTA */ #define BOARD_INITPINS_PMIC_LDO_E_PIN 19U /*!<@brief PORTA pin index: 19 */ /* @} */ /*! @name PORTC1 (number 22), FPGA_GPIO @{ */ #define BOARD_INITPINS_FPGA_GPIO_GPIO GPIOC /*!<@brief GPIO device name: GPIOC */ #define BOARD_INITPINS_FPGA_GPIO_PORT PORTC /*!<@brief PORT device name: PORTC */ #define BOARD_INITPINS_FPGA_GPIO_PIN 1U /*!<@brief PORTC pin index: 1 */ /* @} */ /*! * @brief Configures pin routing and optionally pin electrical features. * */ void BOARD_InitPins(void); #if defined(__cplusplus) } #endif /*! * @} */ #endif /* _PIN_MUX_H_ */ /*********************************************************************************************************************** * EOF **********************************************************************************************************************/