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Diffstat (limited to 'startup/startup_mk02f12810.c')
| -rw-r--r-- | startup/startup_mk02f12810.c | 823 |
1 files changed, 823 insertions, 0 deletions
diff --git a/startup/startup_mk02f12810.c b/startup/startup_mk02f12810.c new file mode 100644 index 0000000..51a0987 --- /dev/null +++ b/startup/startup_mk02f12810.c @@ -0,0 +1,823 @@ +//***************************************************************************** +// MK02F12810 startup code for use with MCUXpresso IDE +// +// Version : 051217 +//***************************************************************************** +// +// The Clear BSD License +// Copyright 2016-2017 NXP +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted (subject to the limitations in the +// disclaimer below) provided that the following conditions are met: +// +// * Redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer. +// +// * Redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution. +// +// * Neither the name of the copyright holder nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE +// GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT +// HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED +// WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF +// MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE +// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR +// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF +// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR +// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +// OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN +// IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +//***************************************************************************** + +#if defined (DEBUG) +#pragma GCC push_options +#pragma GCC optimize ("Og") +#endif // (DEBUG) + +#if defined (__cplusplus) +#ifdef __REDLIB__ +#error Redlib does not support C++ +#else +//***************************************************************************** +// +// The entry point for the C++ library startup +// +//***************************************************************************** +extern "C" { + extern void __libc_init_array(void); +} +#endif +#endif + +#define WEAK __attribute__ ((weak)) +#define WEAK_AV __attribute__ ((weak, section(".after_vectors"))) +#define ALIAS(f) __attribute__ ((weak, alias (#f))) + +//***************************************************************************** +#if defined (__cplusplus) +extern "C" { +#endif + +//***************************************************************************** +// Flash Configuration block : 16-byte flash configuration field that stores +// default protection settings (loaded on reset) and security information that +// allows the MCU to restrict access to the Flash Memory module. +// Placed at address 0x400 by the linker script. +//***************************************************************************** +__attribute__ ((used,section(".FlashConfig"))) const struct { + unsigned int word1; + unsigned int word2; + unsigned int word3; + unsigned int word4; +} Flash_Config = {0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFBFE}; +//***************************************************************************** +// Declaration of external SystemInit function +//***************************************************************************** +#if defined (__USE_CMSIS) +extern void SystemInit(void); +#endif // (__USE_CMSIS) + +//***************************************************************************** +// Forward declaration of the core exception handlers. +// When the application defines a handler (with the same name), this will +// automatically take precedence over these weak definitions +//***************************************************************************** + void ResetISR(void); +WEAK void NMI_Handler(void); +WEAK void HardFault_Handler(void); +WEAK void MemManage_Handler(void); +WEAK void BusFault_Handler(void); +WEAK void UsageFault_Handler(void); +WEAK void SVC_Handler(void); +WEAK void DebugMon_Handler(void); +WEAK void PendSV_Handler(void); +WEAK void SysTick_Handler(void); +WEAK void IntDefaultHandler(void); + +//***************************************************************************** +// Forward declaration of the application IRQ handlers. When the application +// defines a handler (with the same name), this will automatically take +// precedence over weak definitions below +//***************************************************************************** +WEAK void DMA0_IRQHandler(void); +WEAK void DMA1_IRQHandler(void); +WEAK void DMA2_IRQHandler(void); +WEAK void DMA3_IRQHandler(void); +WEAK void Reserved20_IRQHandler(void); +WEAK void Reserved21_IRQHandler(void); +WEAK void Reserved22_IRQHandler(void); +WEAK void Reserved23_IRQHandler(void); +WEAK void Reserved24_IRQHandler(void); +WEAK void Reserved25_IRQHandler(void); +WEAK void Reserved26_IRQHandler(void); +WEAK void Reserved27_IRQHandler(void); +WEAK void Reserved28_IRQHandler(void); +WEAK void Reserved29_IRQHandler(void); +WEAK void Reserved30_IRQHandler(void); +WEAK void Reserved31_IRQHandler(void); +WEAK void DMA_Error_IRQHandler(void); +WEAK void MCM_IRQHandler(void); +WEAK void FTF_IRQHandler(void); +WEAK void Read_Collision_IRQHandler(void); +WEAK void LVD_LVW_IRQHandler(void); +WEAK void LLWU_IRQHandler(void); +WEAK void WDOG_EWM_IRQHandler(void); +WEAK void Reserved39_IRQHandler(void); +WEAK void I2C0_IRQHandler(void); +WEAK void Reserved41_IRQHandler(void); +WEAK void SPI0_IRQHandler(void); +WEAK void Reserved43_IRQHandler(void); +WEAK void Reserved44_IRQHandler(void); +WEAK void Reserved45_IRQHandler(void); +WEAK void Reserved46_IRQHandler(void); +WEAK void UART0_RX_TX_IRQHandler(void); +WEAK void UART0_ERR_IRQHandler(void); +WEAK void UART1_RX_TX_IRQHandler(void); +WEAK void UART1_ERR_IRQHandler(void); +WEAK void Reserved51_IRQHandler(void); +WEAK void Reserved52_IRQHandler(void); +WEAK void Reserved53_IRQHandler(void); +WEAK void Reserved54_IRQHandler(void); +WEAK void ADC0_IRQHandler(void); +WEAK void CMP0_IRQHandler(void); +WEAK void CMP1_IRQHandler(void); +WEAK void FTM0_IRQHandler(void); +WEAK void FTM1_IRQHandler(void); +WEAK void FTM2_IRQHandler(void); +WEAK void Reserved61_IRQHandler(void); +WEAK void Reserved62_IRQHandler(void); +WEAK void Reserved63_IRQHandler(void); +WEAK void PIT0_IRQHandler(void); +WEAK void PIT1_IRQHandler(void); +WEAK void PIT2_IRQHandler(void); +WEAK void PIT3_IRQHandler(void); +WEAK void PDB0_IRQHandler(void); +WEAK void Reserved69_IRQHandler(void); +WEAK void Reserved70_IRQHandler(void); +WEAK void Reserved71_IRQHandler(void); +WEAK void DAC0_IRQHandler(void); +WEAK void MCG_IRQHandler(void); +WEAK void LPTMR0_IRQHandler(void); +WEAK void PORTA_IRQHandler(void); +WEAK void PORTB_IRQHandler(void); +WEAK void PORTC_IRQHandler(void); +WEAK void PORTD_IRQHandler(void); +WEAK void PORTE_IRQHandler(void); +WEAK void SWI_IRQHandler(void); + +//***************************************************************************** +// Forward declaration of the driver IRQ handlers. These are aliased +// to the IntDefaultHandler, which is a 'forever' loop. When the driver +// defines a handler (with the same name), this will automatically take +// precedence over these weak definitions +//***************************************************************************** +void DMA0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void DMA1_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void DMA2_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void DMA3_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved20_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved21_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved22_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved23_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved24_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved25_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved26_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved27_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved28_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved29_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved30_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved31_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void DMA_Error_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void MCM_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void FTF_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Read_Collision_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void LVD_LVW_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void LLWU_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void WDOG_EWM_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved39_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void I2C0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved41_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void SPI0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved43_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved44_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved45_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved46_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void UART0_RX_TX_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void UART0_ERR_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void UART1_RX_TX_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void UART1_ERR_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved51_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved52_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved53_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved54_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void ADC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void CMP0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void CMP1_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void FTM0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void FTM1_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void FTM2_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved61_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved62_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved63_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PIT0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PIT1_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PIT2_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PIT3_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PDB0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved69_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved70_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void Reserved71_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void DAC0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void MCG_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void LPTMR0_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PORTA_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PORTB_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PORTC_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PORTD_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void PORTE_DriverIRQHandler(void) ALIAS(IntDefaultHandler); +void SWI_DriverIRQHandler(void) ALIAS(IntDefaultHandler); + +//***************************************************************************** +// The entry point for the application. +// __main() is the entry point for Redlib based applications +// main() is the entry point for Newlib based applications +//***************************************************************************** +#if defined (__REDLIB__) +extern void __main(void); +#endif +extern int main(void); + +//***************************************************************************** +// External declaration for the pointer to the stack top from the Linker Script +//***************************************************************************** +extern void _vStackTop(void); +//***************************************************************************** +#if defined (__cplusplus) +} // extern "C" +#endif +//***************************************************************************** +// The vector table. +// This relies on the linker script to place at correct location in memory. +//***************************************************************************** +extern void (* const g_pfnVectors[])(void); +extern void * __Vectors __attribute__ ((alias ("g_pfnVectors"))); + +__attribute__ ((used, section(".isr_vector"))) +void (* const g_pfnVectors[])(void) = { + // Core Level - CM4 + &_vStackTop, // The initial stack pointer + ResetISR, // The reset handler + NMI_Handler, // The NMI handler + HardFault_Handler, // The hard fault handler + MemManage_Handler, // The MPU fault handler + BusFault_Handler, // The bus fault handler + UsageFault_Handler, // The usage fault handler + 0, // Reserved + 0, // Reserved + 0, // Reserved + 0, // Reserved + SVC_Handler, // SVCall handler + DebugMon_Handler, // Debug monitor handler + 0, // Reserved + PendSV_Handler, // The PendSV handler + SysTick_Handler, // The SysTick handler + + // Chip Level - MK02F12810 + DMA0_IRQHandler, // 16: DMA Channel 0 Transfer Complete + DMA1_IRQHandler, // 17: DMA Channel 1 Transfer Complete + DMA2_IRQHandler, // 18: DMA Channel 2 Transfer Complete + DMA3_IRQHandler, // 19: DMA Channel 3 Transfer Complete + Reserved20_IRQHandler, // 20: Reserved interrupt + Reserved21_IRQHandler, // 21: Reserved interrupt + Reserved22_IRQHandler, // 22: Reserved interrupt + Reserved23_IRQHandler, // 23: Reserved interrupt + Reserved24_IRQHandler, // 24: Reserved interrupt + Reserved25_IRQHandler, // 25: Reserved interrupt + Reserved26_IRQHandler, // 26: Reserved interrupt + Reserved27_IRQHandler, // 27: Reserved interrupt + Reserved28_IRQHandler, // 28: Reserved interrupt + Reserved29_IRQHandler, // 29: Reserved interrupt + Reserved30_IRQHandler, // 30: Reserved interrupt + Reserved31_IRQHandler, // 31: Reserved interrupt + DMA_Error_IRQHandler, // 32: DMA Error Interrupt + MCM_IRQHandler, // 33: Normal Interrupt + FTF_IRQHandler, // 34: FTFA Command complete interrupt + Read_Collision_IRQHandler, // 35: Read Collision Interrupt + LVD_LVW_IRQHandler, // 36: Low Voltage Detect, Low Voltage Warning + LLWU_IRQHandler, // 37: Low Leakage Wakeup Unit + WDOG_EWM_IRQHandler, // 38: WDOG Interrupt + Reserved39_IRQHandler, // 39: Reserved interrupt + I2C0_IRQHandler, // 40: I2C0 interrupt + Reserved41_IRQHandler, // 41: Reserved interrupt + SPI0_IRQHandler, // 42: SPI0 Interrupt + Reserved43_IRQHandler, // 43: Reserved interrupt + Reserved44_IRQHandler, // 44: Reserved interrupt + Reserved45_IRQHandler, // 45: Reserved interrupt + Reserved46_IRQHandler, // 46: Reserved interrupt + UART0_RX_TX_IRQHandler, // 47: UART0 Receive/Transmit interrupt + UART0_ERR_IRQHandler, // 48: UART0 Error interrupt + UART1_RX_TX_IRQHandler, // 49: UART1 Receive/Transmit interrupt + UART1_ERR_IRQHandler, // 50: UART1 Error interrupt + Reserved51_IRQHandler, // 51: Reserved interrupt + Reserved52_IRQHandler, // 52: Reserved interrupt + Reserved53_IRQHandler, // 53: Reserved interrupt + Reserved54_IRQHandler, // 54: Reserved interrupt + ADC0_IRQHandler, // 55: ADC0 interrupt + CMP0_IRQHandler, // 56: CMP0 interrupt + CMP1_IRQHandler, // 57: CMP1 interrupt + FTM0_IRQHandler, // 58: FTM0 fault, overflow and channels interrupt + FTM1_IRQHandler, // 59: FTM1 fault, overflow and channels interrupt + FTM2_IRQHandler, // 60: FTM2 fault, overflow and channels interrupt + Reserved61_IRQHandler, // 61: Reserved interrupt + Reserved62_IRQHandler, // 62: Reserved interrupt + Reserved63_IRQHandler, // 63: Reserved interrupt + PIT0_IRQHandler, // 64: PIT timer channel 0 interrupt + PIT1_IRQHandler, // 65: PIT timer channel 1 interrupt + PIT2_IRQHandler, // 66: PIT timer channel 2 interrupt + PIT3_IRQHandler, // 67: PIT timer channel 3 interrupt + PDB0_IRQHandler, // 68: PDB0 Interrupt + Reserved69_IRQHandler, // 69: Reserved interrupt + Reserved70_IRQHandler, // 70: Reserved interrupt + Reserved71_IRQHandler, // 71: Reserved interrupt + DAC0_IRQHandler, // 72: DAC0 interrupt + MCG_IRQHandler, // 73: MCG Interrupt + LPTMR0_IRQHandler, // 74: LPTimer interrupt + PORTA_IRQHandler, // 75: Port A interrupt + PORTB_IRQHandler, // 76: Port B interrupt + PORTC_IRQHandler, // 77: Port C interrupt + PORTD_IRQHandler, // 78: Port D interrupt + PORTE_IRQHandler, // 79: Port E interrupt + SWI_IRQHandler, // 80: Software interrupt +}; /* End of g_pfnVectors */ + +//***************************************************************************** +// Functions to carry out the initialization of RW and BSS data sections. These +// are written as separate functions rather than being inlined within the +// ResetISR() function in order to cope with MCUs with multiple banks of +// memory. +//***************************************************************************** +__attribute__ ((section(".after_vectors.init_data"))) +void data_init(unsigned int romstart, unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int *pulSrc = (unsigned int*) romstart; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = *pulSrc++; +} + +__attribute__ ((section(".after_vectors.init_bss"))) +void bss_init(unsigned int start, unsigned int len) { + unsigned int *pulDest = (unsigned int*) start; + unsigned int loop; + for (loop = 0; loop < len; loop = loop + 4) + *pulDest++ = 0; +} + +//***************************************************************************** +// The following symbols are constructs generated by the linker, indicating +// the location of various points in the "Global Section Table". This table is +// created by the linker via the Code Red managed linker script mechanism. It +// contains the load address, execution address and length of each RW data +// section and the execution and length of each BSS (zero initialized) section. +//***************************************************************************** +extern unsigned int __data_section_table; +extern unsigned int __data_section_table_end; +extern unsigned int __bss_section_table; +extern unsigned int __bss_section_table_end; + +//***************************************************************************** +// Reset entry point for your code. +// Sets up a simple runtime environment and initializes the C/C++ +// library. +//***************************************************************************** +__attribute__ ((section(".after_vectors.reset"))) +void ResetISR(void) { + + // Disable interrupts + __asm volatile ("cpsid i"); + +#if defined (__USE_CMSIS) +// If __USE_CMSIS defined, then call CMSIS SystemInit code + SystemInit(); + +#else + // Disable Watchdog + // Write 0xC520 to watchdog unlock register + *((volatile unsigned short *)0x4005200E) = 0xC520; + // Followed by 0xD928 to complete the unlock + *((volatile unsigned short *)0x4005200E) = 0xD928; + // Now disable watchdog via STCTRLH register + *((volatile unsigned short *)0x40052000) = 0x01D2u; +#endif // (__USE_CMSIS) + + // + // Copy the data sections from flash to SRAM. + // + unsigned int LoadAddr, ExeAddr, SectionLen; + unsigned int *SectionTableAddr; + + // Load base address of Global Section Table + SectionTableAddr = &__data_section_table; + + // Copy the data sections from flash to SRAM. + while (SectionTableAddr < &__data_section_table_end) { + LoadAddr = *SectionTableAddr++; + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + data_init(LoadAddr, ExeAddr, SectionLen); + } + + // At this point, SectionTableAddr = &__bss_section_table; + // Zero fill the bss segment + while (SectionTableAddr < &__bss_section_table_end) { + ExeAddr = *SectionTableAddr++; + SectionLen = *SectionTableAddr++; + bss_init(ExeAddr, SectionLen); + } + +#if !defined (__USE_CMSIS) +// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code +// will enable the FPU +#if defined (__VFP_FP__) && !defined (__SOFTFP__) + // + // Code to enable the Cortex-M4 FPU only included + // if appropriate build options have been selected. + // Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C) + // + // Read CPACR (located at address 0xE000ED88) + // Set bits 20-23 to enable CP10 and CP11 coprocessors + // Write back the modified value to the CPACR + asm volatile ("LDR.W R0, =0xE000ED88\n\t" + "LDR R1, [R0]\n\t" + "ORR R1, R1, #(0xF << 20)\n\t" + "STR R1, [R0]"); +#endif // (__VFP_FP__) && !(__SOFTFP__) +#endif // (__USE_CMSIS) + +#if !defined (__USE_CMSIS) +// Assume that if __USE_CMSIS defined, then CMSIS SystemInit code +// will setup the VTOR register + + // Check to see if we are running the code from a non-zero + // address (eg RAM, external flash), in which case we need + // to modify the VTOR register to tell the CPU that the + // vector table is located at a non-0x0 address. + unsigned int * pSCB_VTOR = (unsigned int *) 0xE000ED08; + if ((unsigned int *)g_pfnVectors!=(unsigned int *) 0x00000000) { + *pSCB_VTOR = (unsigned int)g_pfnVectors; + } +#endif // (__USE_CMSIS) + +#if defined (__cplusplus) + // + // Call C++ library initialisation + // + __libc_init_array(); +#endif + + // Reenable interrupts + __asm volatile ("cpsie i"); + +#if defined (__REDLIB__) + // Call the Redlib library, which in turn calls main() + __main(); +#else + main(); +#endif + + // + // main() shouldn't return, but if it does, we'll just enter an infinite loop + // + while (1) { + ; + } +} + +//***************************************************************************** +// Default core exception handlers. Override the ones here by defining your own +// handler routines in your application code. +//***************************************************************************** +WEAK_AV void NMI_Handler(void) +{ while(1) {} +} + +WEAK_AV void HardFault_Handler(void) +{ while(1) {} +} + +WEAK_AV void MemManage_Handler(void) +{ while(1) {} +} + +WEAK_AV void BusFault_Handler(void) +{ while(1) {} +} + +WEAK_AV void UsageFault_Handler(void) +{ while(1) {} +} + +WEAK_AV void SVC_Handler(void) +{ while(1) {} +} + +WEAK_AV void DebugMon_Handler(void) +{ while(1) {} +} + +WEAK_AV void PendSV_Handler(void) +{ while(1) {} +} + +WEAK_AV void SysTick_Handler(void) +{ while(1) {} +} + +//***************************************************************************** +// Processor ends up here if an unexpected interrupt occurs or a specific +// handler is not present in the application code. +//***************************************************************************** +WEAK_AV void IntDefaultHandler(void) +{ while(1) {} +} + +//***************************************************************************** +// Default application exception handlers. Override the ones here by defining +// your own handler routines in your application code. These routines call +// driver exception handlers or IntDefaultHandler() if no driver exception +// handler is included. +//***************************************************************************** +WEAK void DMA0_IRQHandler(void) +{ DMA0_DriverIRQHandler(); +} + +WEAK void DMA1_IRQHandler(void) +{ DMA1_DriverIRQHandler(); +} + +WEAK void DMA2_IRQHandler(void) +{ DMA2_DriverIRQHandler(); +} + +WEAK void DMA3_IRQHandler(void) +{ DMA3_DriverIRQHandler(); +} + +WEAK void Reserved20_IRQHandler(void) +{ Reserved20_DriverIRQHandler(); +} + +WEAK void Reserved21_IRQHandler(void) +{ Reserved21_DriverIRQHandler(); +} + +WEAK void Reserved22_IRQHandler(void) +{ Reserved22_DriverIRQHandler(); +} + +WEAK void Reserved23_IRQHandler(void) +{ Reserved23_DriverIRQHandler(); +} + +WEAK void Reserved24_IRQHandler(void) +{ Reserved24_DriverIRQHandler(); +} + +WEAK void Reserved25_IRQHandler(void) +{ Reserved25_DriverIRQHandler(); +} + +WEAK void Reserved26_IRQHandler(void) +{ Reserved26_DriverIRQHandler(); +} + +WEAK void Reserved27_IRQHandler(void) +{ Reserved27_DriverIRQHandler(); +} + +WEAK void Reserved28_IRQHandler(void) +{ Reserved28_DriverIRQHandler(); +} + +WEAK void Reserved29_IRQHandler(void) +{ Reserved29_DriverIRQHandler(); +} + +WEAK void Reserved30_IRQHandler(void) +{ Reserved30_DriverIRQHandler(); +} + +WEAK void Reserved31_IRQHandler(void) +{ Reserved31_DriverIRQHandler(); +} + +WEAK void DMA_Error_IRQHandler(void) +{ DMA_Error_DriverIRQHandler(); +} + +WEAK void MCM_IRQHandler(void) +{ MCM_DriverIRQHandler(); +} + +WEAK void FTF_IRQHandler(void) +{ FTF_DriverIRQHandler(); +} + +WEAK void Read_Collision_IRQHandler(void) +{ Read_Collision_DriverIRQHandler(); +} + +WEAK void LVD_LVW_IRQHandler(void) +{ LVD_LVW_DriverIRQHandler(); +} + +WEAK void LLWU_IRQHandler(void) +{ LLWU_DriverIRQHandler(); +} + +WEAK void WDOG_EWM_IRQHandler(void) +{ WDOG_EWM_DriverIRQHandler(); +} + +WEAK void Reserved39_IRQHandler(void) +{ Reserved39_DriverIRQHandler(); +} + +WEAK void I2C0_IRQHandler(void) +{ I2C0_DriverIRQHandler(); +} + +WEAK void Reserved41_IRQHandler(void) +{ Reserved41_DriverIRQHandler(); +} + +WEAK void SPI0_IRQHandler(void) +{ SPI0_DriverIRQHandler(); +} + +WEAK void Reserved43_IRQHandler(void) +{ Reserved43_DriverIRQHandler(); +} + +WEAK void Reserved44_IRQHandler(void) +{ Reserved44_DriverIRQHandler(); +} + +WEAK void Reserved45_IRQHandler(void) +{ Reserved45_DriverIRQHandler(); +} + +WEAK void Reserved46_IRQHandler(void) +{ Reserved46_DriverIRQHandler(); +} + +WEAK void UART0_RX_TX_IRQHandler(void) +{ UART0_RX_TX_DriverIRQHandler(); +} + +WEAK void UART0_ERR_IRQHandler(void) +{ UART0_ERR_DriverIRQHandler(); +} + +WEAK void UART1_RX_TX_IRQHandler(void) +{ UART1_RX_TX_DriverIRQHandler(); +} + +WEAK void UART1_ERR_IRQHandler(void) +{ UART1_ERR_DriverIRQHandler(); +} + +WEAK void Reserved51_IRQHandler(void) +{ Reserved51_DriverIRQHandler(); +} + +WEAK void Reserved52_IRQHandler(void) +{ Reserved52_DriverIRQHandler(); +} + +WEAK void Reserved53_IRQHandler(void) +{ Reserved53_DriverIRQHandler(); +} + +WEAK void Reserved54_IRQHandler(void) +{ Reserved54_DriverIRQHandler(); +} + +WEAK void ADC0_IRQHandler(void) +{ ADC0_DriverIRQHandler(); +} + +WEAK void CMP0_IRQHandler(void) +{ CMP0_DriverIRQHandler(); +} + +WEAK void CMP1_IRQHandler(void) +{ CMP1_DriverIRQHandler(); +} + +WEAK void FTM0_IRQHandler(void) +{ FTM0_DriverIRQHandler(); +} + +WEAK void FTM1_IRQHandler(void) +{ FTM1_DriverIRQHandler(); +} + +WEAK void FTM2_IRQHandler(void) +{ FTM2_DriverIRQHandler(); +} + +WEAK void Reserved61_IRQHandler(void) +{ Reserved61_DriverIRQHandler(); +} + +WEAK void Reserved62_IRQHandler(void) +{ Reserved62_DriverIRQHandler(); +} + +WEAK void Reserved63_IRQHandler(void) +{ Reserved63_DriverIRQHandler(); +} + +WEAK void PIT0_IRQHandler(void) +{ PIT0_DriverIRQHandler(); +} + +WEAK void PIT1_IRQHandler(void) +{ PIT1_DriverIRQHandler(); +} + +WEAK void PIT2_IRQHandler(void) +{ PIT2_DriverIRQHandler(); +} + +WEAK void PIT3_IRQHandler(void) +{ PIT3_DriverIRQHandler(); +} + +WEAK void PDB0_IRQHandler(void) +{ PDB0_DriverIRQHandler(); +} + +WEAK void Reserved69_IRQHandler(void) +{ Reserved69_DriverIRQHandler(); +} + +WEAK void Reserved70_IRQHandler(void) +{ Reserved70_DriverIRQHandler(); +} + +WEAK void Reserved71_IRQHandler(void) +{ Reserved71_DriverIRQHandler(); +} + +WEAK void DAC0_IRQHandler(void) +{ DAC0_DriverIRQHandler(); +} + +WEAK void MCG_IRQHandler(void) +{ MCG_DriverIRQHandler(); +} + +WEAK void LPTMR0_IRQHandler(void) +{ LPTMR0_DriverIRQHandler(); +} + +WEAK void PORTA_IRQHandler(void) +{ PORTA_DriverIRQHandler(); +} + +WEAK void PORTB_IRQHandler(void) +{ PORTB_DriverIRQHandler(); +} + +WEAK void PORTC_IRQHandler(void) +{ PORTC_DriverIRQHandler(); +} + +WEAK void PORTD_IRQHandler(void) +{ PORTD_DriverIRQHandler(); +} + +WEAK void PORTE_IRQHandler(void) +{ PORTE_DriverIRQHandler(); +} + +WEAK void SWI_IRQHandler(void) +{ SWI_DriverIRQHandler(); +} + +//***************************************************************************** + +#if defined (DEBUG) +#pragma GCC pop_options +#endif // (DEBUG) |