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diff --git a/board/clock_config.c b/board/clock_config.c
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+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
+ * and flash clock are in allowed range during clock mode switch.
+ *
+ * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
+ *
+ * 3. Set MCG configuration, MCG includes three parts: FLL clock, PLL clock and
+ * internal reference clock(MCGIRCLK). Follow the steps to setup:
+ *
+ * 1). Call CLOCK_BootToXxxMode to set MCG to target mode.
+ *
+ * 2). If target mode is FBI/BLPI/PBI mode, the MCGIRCLK has been configured
+ * correctly. For other modes, need to call CLOCK_SetInternalRefClkConfig
+ * explicitly to setup MCGIRCLK.
+ *
+ * 3). Don't need to configure FLL explicitly, because if target mode is FLL
+ * mode, then FLL has been configured by the function CLOCK_BootToXxxMode,
+ * if the target mode is not FLL mode, the FLL is disabled.
+ *
+ * 4). If target mode is PEE/PBE/PEI/PBI mode, then the related PLL has been
+ * setup by CLOCK_BootToXxxMode. In FBE/FBI/FEE/FBE mode, the PLL could
+ * be enabled independently, call CLOCK_EnablePll0 explicitly in this case.
+ *
+ * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v4.1
+processor: MK02FN128xxx10
+package_id: MK02FN128VFM10
+mcu_data: ksdk2_0
+processor_version: 4.0.0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define MCG_IRCLK_DISABLE 0U /*!< MCGIRCLK disabled */
+#define OSC_CAP0P 0U /*!< Oscillator 0pF capacitor load */
+#define OSC_ER_CLK_DISABLE 0U /*!< Disable external reference clock */
+#define SIM_OSC32KSEL_OSC32KCLK_CLK 0U /*!< OSC32KSEL select: OSC32KCLK clock */
+#define SIM_PLLFLLSEL_MCGFLLCLK_CLK 0U /*!< PLLFLL select: MCGFLLCLK clock */
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : CLOCK_CONFIG_FllStableDelay
+ * Description : This function is used to delay for FLL stable.
+ *
+ *END**************************************************************************/
+static void CLOCK_CONFIG_FllStableDelay(void)
+{
+ uint32_t i = 30000U;
+ while (i--)
+ {
+ __NOP();
+ }
+}
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+ BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: Bus_clock.outFreq, value: 41.94304 MHz}
+- {id: Core_clock.outFreq, value: 41.94304 MHz}
+- {id: Flash_clock.outFreq, value: 20.97152 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: MCGFFCLK.outFreq, value: 32.768 kHz}
+- {id: PLLFLLCLK.outFreq, value: 41.94304 MHz}
+- {id: System_clock.outFreq, value: 41.94304 MHz}
+settings:
+- {id: MCG.FLL_mul.scale, value: '1280', locked: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const mcg_config_t mcgConfig_BOARD_BootClockRUN =
+ {
+ .mcgMode = kMCG_ModeFEI, /* FEI - FLL Engaged Internal */
+ .irclkEnableMode = MCG_IRCLK_DISABLE, /* MCGIRCLK disabled */
+ .ircs = kMCG_IrcSlow, /* Slow internal reference clock selected */
+ .fcrdiv = 0x1U, /* Fast IRC divider: divided by 2 */
+ .frdiv = 0x0U, /* FLL reference clock divider: divided by 1 */
+ .drs = kMCG_DrsMid, /* Mid frequency range */
+ .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25% */
+ .oscsel = kMCG_OscselOsc, /* Selects System Oscillator (OSCCLK) */
+ };
+const sim_clock_config_t simConfig_BOARD_BootClockRUN =
+ {
+ .pllFllSel = SIM_PLLFLLSEL_MCGFLLCLK_CLK, /* PLLFLL select: MCGFLLCLK clock */
+ .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK, /* OSC32KSEL select: OSC32KCLK clock */
+ .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV4: /2 */
+ };
+const osc_config_t oscConfig_BOARD_BootClockRUN =
+ {
+ .freq = 0U, /* Oscillator frequency: 0Hz */
+ .capLoad = (OSC_CAP0P), /* Oscillator capacity load: 0pF */
+ .workMode = kOSC_ModeExt, /* Use external clock */
+ .oscerConfig =
+ {
+ .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
+ .erclkDiv = 0, /* Divider for OSCERCLK: divided by 1 */
+ }
+ };
+
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+ /* Set the system clock dividers in SIM to safe value. */
+ CLOCK_SetSimSafeDivs();
+ /* Set MCG to FEI mode. */
+#if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 2, 0)
+ CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.dmx32,
+ mcgConfig_BOARD_BootClockRUN.drs,
+ CLOCK_CONFIG_FllStableDelay);
+#else
+ CLOCK_BootToFeiMode(mcgConfig_BOARD_BootClockRUN.drs,
+ CLOCK_CONFIG_FllStableDelay);
+#endif
+ /* Configure the Internal Reference clock (MCGIRCLK). */
+ CLOCK_SetInternalRefClkConfig(mcgConfig_BOARD_BootClockRUN.irclkEnableMode,
+ mcgConfig_BOARD_BootClockRUN.ircs,
+ mcgConfig_BOARD_BootClockRUN.fcrdiv);
+ /* Set the clock configuration in SIM module. */
+ CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
+ /* Set SystemCoreClock variable. */
+ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
+



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