Mind Chasers Inc.
Mind Chasers Inc.

Open Source FPGA-based Network Processor for Education

Mind Chasers Inc. is pleased to announce that we will sponsor a limited number of university and high school efforts this year (2019/2020) for students that desire to work with the Private Island open source network processor in the areas of network security and privacy.

As part of this program, we will provide, free of charge, a Darsena development board and potentially (custom) daughter cards depending on the nature of the project. Also, through an agreement with Lattice Semiconductor, we will a provide a full one-year Lattice Diamond license. The Diamond IDE provides a professional synthesis and simulation environment for FPGA development. All other required software tools and libraries are open source (e.g., Eclipse, OpenOCD, etc.).

We believe that this open source networking project and development board are ideal for innovative university senior projects, master theses, advanced high school cybersecurity clubs, research, and the like.

If you're interested in having your project or cybersecurity club considered for sponsorship, then please fill out the form at the bottom of this page.

Project Overview

The Private Island open source project utilizes an FPGA for networking in order to build an open, trustworthy, and extensible foundation for packet processing, security, IoT, and control.

The open FPGA-based architecture supports numerous, highly parallel functions implemented at Gigabit Ethernet line rate (125 MHz x 8-bit). Core functionality includes packet classification, filtering, mirroring, and multi-port switching. Our Darsena development board, which is Arduino form factor and pin out compatible, supports Ethernet connectivity via two on-board Gigabit Ethernet PHYs and includes an ARM micro controller, debug, and support for standard and custom shields (e.g., third Ethernet port).

The use of an FPGA with an open source Verilog code base for networking is in stark contrast to off-the-shelf SoC implementations, which require developers & users to make assumptions about multiple opaque hardware & firmware layers and closed source being free of bugs, back doors, malware, and resident spies.

We are active in the development of Private Island and support it for education because we believe that it is necessary to re-think approaches to utilizing networks in an open, secure, transparent, and trustworthy manner. Also, we are in the process of moving the open source code base from Github to mindchasers.com. We're doing this because it is all too common today that Big Tech spies on us and censors or removes our activity.

Private Island Conceptual Block Diagram
Private Island System Concept

Note: shown with optional third Ethernet port

Potential Educational / Research Projects

Private Island is an open source project, so you're very much encouraged to think big and try to add your own mark on the project. Below is a listing of some of the broad areas that interest us, but please feel free to also propose your own ideas and innovations.

Embedded Neural Network Engine for Machine Learning Applications: The Lattice ECP5UM is a 45K LUT FPGA, and the core project utilizes a small fraction of the device. Also, the embedded DSP blocks are not currently being utilized. Therefore, create an embedded, real-time neural network that can be used to identify abnormal network activity that may be caused by intrusions or maclicious actors from within. Work should include the definition and validation of meaningful (meta) data that can be fed to the network.

Machine Learning in the Cloud Using Real-Time Metrics and Data: Use the FPGA to create complex (regular expression) patterns and collect meta data that can then be streamed to a trusted machine learning engine either in the cloud (e.g., IBM Watson) or resident on site.

Network Visualization: The FPGA can be used to create complex packet filters for capturing various data patterns. Stream the collected (meta) data in real-time to a Web browser and make use of Javascript visualization libraries (e.g, D3) for new unique, meaningful visualizations of network patterns and behavior.

Threat Modeling and Generation: We are concerned about backdoors being introduced into network nodes. Conceptualize how backdoors can be created and discovered. Make use of the FPGA to generate random network patterns, protocols, and timings to probe wired and wireless interfaces for backdoors and vulnerabilities. Also, potentially create and test new backdoors.

Secure Communication: Create and test novel, secure communication channels between FPGA-based endpoints using non-traditional key exchanges and (quantum proof) hardware-based cryptographic algorithms.

Identify and Thwart Undesirable Network Activty: This could be as straightforward as placing a Darsena between an Ethernet switch & a Windows PC and limiting unrecognized or unwanted activity between the PC and the network (e.g, preventing upgrades or network activity while a PC is idle).

Shield Design: Darsena can accept various Arduino compatible shields plus custom shields that support high-speed LVDS signalling via the FPGA. We will soon be publishing some open-source shield designs, and students are welcomed and encouraged to modify them for their own use (e.g., create secure communication endpoints).

Arduino Integration: The next revision of Darsena will be capable of being used as a shield for Arduino, and Arduino library integration work is needed.

Can Private Island be Trusted?: What does it take to create a truly open, secure and trustworthy node? What are the weaknesses with the existing approach and how can they be eliminated?

Test, Test benches, Library Integration, and Documentation: As with any open source project, there is no shortage of tasks that need to be accomplished. Many of these tasks would be perfect for a newly formed cybersecurity club while coming up to speed with the existing design and its potential.

more topics coming...

Project Related Documentation

We're in the process of updating all documentation and plan several announcements in the coming weeks. Below is a listing of documentation on this site specific to Private Island & Darsena. Also, there are many other related tech articles on this site that describe various pieces to the puzzle in creating a secure & private network.

Overview of the Private Island project for networking including highlights, goals, and a brief description of the development board.
Architecture and Code Description for the Private Island Open Source, FPGA-based Network Processor
We examine the fields within an Ethernet packet and discuss how they are processed by an open source FPGA network processor.
A high level overview of the usage and configuration of the ECP5UM DCU (PCS/SERDES) for Private Island Open Source Project
Documentation of FPGA'S memory and register interface
A quick start guide for working with Darsena, the Private Island development board for FPGA-based open source networking
Darsena FPGA Development Board for Open Source FPGA-Based Network Security Project
Gigabit data rate shields using standard 100-mil connectors for Arduino form-factor boards including Darsena. Our new SMA Shield design now released as open source.
A summary and concise reference of ECP5UM features and capabilities as applied to the Private Island open source project
[ Page last updated: April 12, 2019 ]
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If you would like to have your university / college or high school project considered for sponsorship, then please fill out the form below.

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